Showing papers on "MOSFET published in 1969"

Phosphosilicate glass stabilization of FET devices

Abstract: The threshold voltage of MOSFET devices can be effectively stabilized from changes due to field-assisted motion of Na+in the gate oxide by the addition of a phosphosilicate glass (PSG) layer. The effectiveness of the glass for this purpose is markedly enhanced by increasing the P 2 O 5 concentration of the PSG. However, polarization of the PSG layer can, in turn, cause an appreciable instability of the threshold voltage. It is shown that detailed knowledge of the behavior of PSG layers permits prediction of the threshold stability of P 2 O 5 -treated FET devices. Thus, threshold stability can be maintained to within 0.1 V/1000 A under device operating conditions by making a proper compromise on PSG thickness and P 2 O 5 concentration. Such stabilizing films offer satisfactory protection against realistic Na+contamination levels. Quantitative data on these phenomena are presented, and a simple structural model is given to account for the polarization and the Na+trapping behavior of the films. The formation of PSG films by doping of SiO 2 with P 2 O 5 at elevated temperatures is discussed.

Modulation of space-charge-limited current flow in insulated-gate field-effect tetrodes

Abstract: The electrical characteristics of n-channel depletion-type and p-channel enhancement-type space-charge-limited tetrodes are presented. The devices are derived from the MOSFET structure and are fabricated on nearly intrinsic silicon substrates with very small channel lengths. In both structures, the current flowing between drain and source can be modulated by either of two high-impedance control terminals. The dominant conduction mechanism is space-charge-limited current flow, and the observed current-voltage characteristics of each device follow the Mott and Gurney relationship at high current levels.

Mosfet momentary switch circuit

Abstract: A metal oxide semiconductor field effect transistor (MOSFET) circuit of a type that can be constructed on a single semiconductor substrate which accepts a signal from a manually operated momentary switch and provides a DC output signal at one of two possible voltage levels The circuit includes a trigger flip-flop which provides the DC output signal The circuit also includes a NOR gate, an RS flip-flop and an inverter interconnected in a manner to prevent the spurious signals caused by switch contact bounce or line noise from giving an incorrect indication at the output of the circuit

Proximity detector and alarm utilizing field effect transistors

Abstract: A proximity detector and alarm in which an antenna is connected to the gate of a metal oxide semiconductor field effect transistor (MOSFET) which causes a silicon controlled switch (SCS) to trigger a blocking oscillator.

Complementary MOS field-effect transistors on high-resistivity silicon substrates

Abstract: p -Channel enhancement mode MOS field-effect transistors have been fabricated on high-resistivity p -type (π) silicon substrates. A high off-state impedance can be achieved with zero gate voltage if the substrate resistivity is sufficiently high so that the p + π low-high junctions formed by the diffusion of the drain and source regions exhibit the desired rectifying characteristics. n -channel MOSFETs can also be fabricated on these high-resistivity π substrates. While the n -channel devices usually exhibit depletion mode characteristics, both n - and p -channel enhancement type MOSFETs can be simultaneously fabricated on a single substrate if Al 2 O 3 -SiO 2 gate insulating layers are used and if Q SS is kept sufficiently small. Selective gold-doping techniques can also be employed to achieve enhancement-type characteristics for both n - and p -channel devices. The channel lengths must be sufficiently large to eliminate SCL current flow from drain to source with zero gate voltage. By using techniques such as beam-lead interconnections or dielectric isolation, complementary MOS integrated circuits can be fabricated on a single substrate and only two diffusions are required. Additional advantages of this approach include extremely high carrier mobilities, very low threshold voltages for both units, and negligible variation of MOSFET characteristics with reverse substrate bias.

Integrated circuit having four mosfet devices arranged in a circle surrounding a guard diffusion

Abstract: A semiconductor device having four insulated gate field effect transistors uses each transistor electrode zone as a common electrode zone for adjacent transistors. The transistors are arranged around a channel stopper and are surrounded by a second channel stopper. The compact structure of the semiconductor device optimizes the use of a substrate area without leakage between electrode zones.

Mosfet static shift register

Abstract: A static serial shift register of a type that can be constructed on a single semiconductor substrate with metal oxide semiconductor field effect transistor (MOSFET) techniques which has a single RS flip-flop plus two MOSFET''s per stage where the MOSFET''s are gated by a clock pulse to conduct the output of a preceding RS flip-flop to a subsequent RS flip-flop.

Substrate current in silicon p-channel MOS transistors

Abstract: Substrate currents are observed in silicon p-channel MOSFET devices. These currents are similar to those observed in n-channel MOSFETs but have a markedly higher threshold voltage.

Integrated flip-flop circuit

Abstract: A MOSFET flip-flop circuit consisting of a slave circuit formed of a pair of cross-coupled MOSFETs and a master circuit connectable to the slave circuit by the trigger pulse is disclosed. Precharging of the slave and master circuits can be accomplished by a system clock or by DC. By substituting an analog voltage for the precharging voltage on one or both sides of the master circuit, the output pulse length and output pulse interval can be separately regulated over a considerable range of integral numbers of trigger pulses. Several flip-flop circuits can be connected through MOSFET gates to produce a binary counter.

Mosfet with dual dielectric of titanium dioxide on silicon dioxide to prevent surface current migration path

Abstract: An insulated gate field effect transistor is described having a titanium dioxide surface layer over the usual insulating layer to interrupt surface charge migration between its source and drain.

Minimization of MOSFET gate leakage current in buffer amplifier circuits

Abstract: It is shown that the components of gate leakage current of a MOSFET used in a previously described unity gain buffer amplifier may be reduced to a minimum under static and dynamic conditions. Modified packaging and novel biasing techniques can minimize both extrinsic and intrinsic components of gate leakage current at the input to the amplifier.

Voltage variable clock oscillator

Abstract: A clock oscillator which can be used as a master clock in a digital system comprising an emitter coupled logic gate operated as a free running bistable device by means of a resistancecapacitance network coupled thereto and which is alternately charged and discharged at the desired output frequency and wherein the resistive element in the network is comprised of a metal oxide silicon field effect transistor (MOSFET) the drainsource resistance of which is selectively varied by means of a potential applied to the gate thereof from an externally controlled source for establishing a desired frequency of operation.

Silicio Ultradelgado Empobrecido en Aislante MOSFET: una simulación basada en COMSOL Multiphysics®

Abstract: We use the MOS transistor model from COMSOL [1] as a template to develop our own UT-FD-SOI-MOSFET with an ultra-thin geometry (Channel thickness = 10nm). SOI-MOSFETs are used to reduce short channel effect problems in actual MOSFET structures and to enable further miniaturization. Our model shows a linear dependence of the front Threshold Voltage with the Back Gate Voltage, which has been reported experimentally by [2] and theoretically by [3].