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Showing papers on "Page layout published in 1995"


Journal ArticleDOI
TL;DR: A review and consolidation of the emerging literature on the GT layout is presented in this paper, where a framework of analysis for developing a GT layout suitable for cellular manufacturing is also suggested.

73 citations


Journal ArticleDOI
TL;DR: SEED-Layout as mentioned in this paper is a module of SEED that supports the generation of schematic layouts of the functional units specified in an architectural program and provides capabilities that allow designers to generate and evaluate rapidly different layout alternatives and versions; to explore the trade-offs involved; and to engage generally in an iterative, highly explorative design process.
Abstract: This paper describes SEED-Layout, a module of SEED that supports the generation of schematic layouts of the functional units specified in an architectural program. SEED-Layout provides capabilities that allow designers to generate and evaluate rapidly different layout alternatives and versions; to explore the trade-offs involved; and to engage generally in an iterative, highly explorative design process. The resulting “design space” is complex, and the paper describes current efforts to provide designers with intelligent “navigation” aids that encourage them to explore interesting portions of this space without “getting lost.” The paper concludes with a brief description of the current implementation and directions for future work.

55 citations


Patent
30 Jun 1995
TL;DR: In this paper, an interactive circuit designing apparatus consisting of a logical designing section for logically designing a design object circuit, a layout design section for performing mounting arrangement of logical components constituted by the logical design, and a speed analysis section for calculating a delay for each of paths on the circuit in accordance with a result of the layout is presented.
Abstract: The invention provides an interactive circuit designing apparatus wherein a logic design, a layout design and a speed analysis can cooperate with each other in processing. The interactive circuit designing apparatus comprises a logical designing section for logically designing a design object circuit, a layout designing section for performing mounting arrangement of logical components constituting a design object circuit based on a result of the logical design and performing wiring between the logical components, and a speed analysis section for performing a speed analysis based on calculation of a delay for each of paths on the design object circuit in accordance with a result of the layout. The logical designing section, the layout designing section and the speed analysis section are connected to each other so as to cooperate with each other when necessary. The interactive circuit designing apparatus is applied to an apparatus for designing a circuit of an LSI, a printed circuit board or a like element.

53 citations


Patent
08 Sep 1995
TL;DR: In this article, a method is described to locate each page specific image region in a background image page layout, where the page specific data are stored in one or more data files, generated by a database application program.
Abstract: In desk top publishing or professional printing, the need exists to print a set of documents which have a generally identical background image and differ from each other by a small area, a page specific image region. A method is described to locate each page specific image region in a background image page layout. A master file stores this background image information along with positional parameters and a file reference to the page specific image region data. The page specific data are stored in one or more data files, generated by a database application program. The master file and page specific file are combined such that the background image is transformed to a bitmap only once, and the page specific data variously modify this bitmap to represent each individual page.

38 citations


Journal ArticleDOI
TL;DR: In this article, a two-step layout design method to consider both loaded and empty vehicle movements is developed to guarantee a complete layout design, where the flow path selection problem is formulated to design guidepath layout with the objective of minimizing loaded vehicle movements.
Abstract: We address the problem of unidirectional guidepath layout design for automated guided vehicle systems- A two-step layout design method to consider both loaded and empty vehicle movements is developed to guarantee a complete layout design. First, the flow path selection (FPS) problem is formulated to design guidepath layout with the objective of minimizing loaded vehicle movements. Both a mathematical model and a heuristic algorithm for FPS are presented. Since AGV guidepath layouts are used by both loaded and empty vehicles, the FPS does not guarantee a closed or complete layout design. For the case when an incomplete or unclosed layout is produced from the first step, a complementary layout design (CLD) approach to convert the incomplete layout into complete one with the consideration of empty vehicle movements is considered in the second step. A heuristic for the CLD problem is developed. An example problem is used to illustrate the whole design approach.

33 citations


Patent
07 Nov 1995
TL;DR: In this article, a reproduction process system is provided for executing a variety of reproduction-related processes without individually specifying page construction data each time, thus improving working efficiency of each process worker.
Abstract: A reproduction process system is provided for executing a variety of reproduction-related processes without individually specifying page construction data each time, thus improving working efficiency of each process worker. In such reproduction process system a magnetic disk unit includes a plurality of job name directories each having a plurality of page number sub-directories. Each page number sub-directory stores page layout data corresponding to a page specified by the page number, picture data, and linework data. When the process worker specifies a desirable job name and a target page number, data of a target page corresponding to page layout data in a page number sub-directory specified by the desirable job name and the target page number are automatically displayed on a CRT screen.

22 citations


Proceedings ArticleDOI
Zhiping Yu1, K. Wang1, Tao Chen1, Robert W. Dutton1, J.T. Watt 
31 May 1995
TL;DR: A software system for 3D solid modeling of IC structures ( devices, interconnection, and circuits) based on the layout design and processing information is described, and the entire process of building an SRAM cell and generating an array of cells is demonstrated.
Abstract: A software system for 3D solid modeling of IC structures (devices, interconnection, and circuits) based on the layout design and processing information is described. Both the 3D perspective view and 2D cross sections of the structure can be examined using the system. Features of the system include automatic update of the geometry as the layout is changed and dynamic display of the process for constructing a structure layer by layer. Coupled with the process simulator and meshing tool, this modeling system can be used for device simulation. Further analysis of interconnection and circuit performance is made possible with other parameter extraction tools. The system configuration, its software components, and numerical techniques in processing mask data are discussed. The entire process of building an SRAM cell and generating an array of cells is demonstrated as an application example of the system.

11 citations


Proceedings ArticleDOI
10 Oct 1995
TL;DR: In this article, an approach for material flow modelling based on a mathematical optimization method was proposed to obtain the guide path layout design of the wire guided vehicles based material handling system, where the objective of the optimization model is the minimization of the total distance travelled by vehicles to transport the required charge plus fixed equipment costs.
Abstract: This paper is concerned with flexible manufacturing systems (FMS) using automated guided vehicle based material handling systems. The automated guided vehicle systems (AGVs) are discrete flow systems and they employ unidirectional and bi-directional guide path networks. This paper has two main objectives. The first one consists in proposing an approach for material flow modelling based on a mathematical optimization method. With this approach can be obtained the guide path layout design of the wire guided vehicles based material handling system. The objective of the mathematical optimization model is the minimization of the total distance travelled by vehicles to transport the required charge plus fixed equipment costs. The authors' second objective deals with the comparison of the problems concerning bi-directional guide path networks and mixed guide path networks (comprised of both unidirectional and bi-directional aisles). The first part of the paper situates the context and the problems concerning flow network layout design. In the second paragraph the authors present a material flow modelling methodology using mathematical optimisation methods. In this part the optimisation model is presented and solved. A study case is presented in the third part. The authors describe the layout choice of the wire guided vehicle system according to performance and financial criteria.

9 citations


Patent
11 Jul 1995
TL;DR: In this article, a reduction printing output function by which the layout of plural pages in one page is performed on a printer which performs the printing processing of each page in band unit is presented.
Abstract: PROBLEM TO BE SOLVED: To easily attach a reduction printing output function by which the layout of plural pages in one page is performed on a printer which performs the printing processing of each page in band unit. SOLUTION: When page layout information is inputted by an input device 12, a CPU 14 the reduction factor of each page image based on inputted page layout information, and generates the reduced page image of the page image stored in a RAM 13 based on a derived reduction factor, and the generated reduced page image of each page is reconfigured in an output page image based on the page layout information, and a reconfigured output page image is divided into band unit, and transferred to the printer.

7 citations


Patent
31 Jan 1995
TL;DR: In this article, the authors propose a register transfer level design supporting device which an estimate with high accuracy an area of a circuit and an operating speed by adding a layout, and can design an outline of the layout simultaneously with the estimation.
Abstract: PURPOSE:To provide a register transfer level design supporting device which an estimate with high accuracy an area of a circuit and an operating speed by adding a layout, and can design an outline of the layout simultaneously with the estimation, in a register transfer level of a circuit design by which a data path part and a control part of the circuit are designed as each independent block on the layout. CONSTITUTION:By plural pieces of library estimating means 10, a library is given, and by layout design system describing means 20a-20c, plural pieces of layout design systems being different from each other are given. Each of data path part performance estimating means 30a-30c estimates an area of a data path part of a circuit and an operating speed by using the library and the layout design system. A floor plant optimizing means 80 optimizes a block shape for considering both of the area of the whole circuit and the operating speed by comparing and studying plural pieces of block realizing methods being different from each other and a result of its estimation.

5 citations


Proceedings ArticleDOI
14 Aug 1995
TL;DR: A multistage layout formation algorithm is proposed and its performance is critically assessed when implemented using two different Layout Object selection criterion, indicating its superiority over previously reported systems.
Abstract: Intelligent Document Understanding (IDU) is the process of converting scanned document pages into an electronic, processable form. We have previously presented a IDU system architecture suitable for this task which uses a hybrid bottom-up/top-down control strategy. In this paper we focus on a specific subproblem that arises within the chosen framework, concerned with selecting an appropriate page layout structure. A detailed analysis of the problem using an error propagation model, allows computationally simple search strategies to be developed. A multistage layout formation algorithm is proposed and its performance is critically assessed when implemented using two different Layout Object selection criterion. The first selection criterion is based on a maximal column area coverage; the second is based on a probabilistic Layout Object selection. Both techniques have been incorporated into the hybrid IDU system and the results presented indicate its superiority over previously reported systems.

Proceedings ArticleDOI
02 Nov 1995
TL;DR: An algorithm which structurally recognises the text of a page image and has a graphical interface which portrays the state of the algorithm during the process of decomposition.
Abstract: The reproduction of a scanned document should include not only the optical character recognition of text, but also the structure of that text on the page and the appearance of that text itself (i.e. font recognition). This is paper presents an algorithm which structurally recognises the text of a page image. The method is based upon the "Docstrum plot" algorithm by L.O'Gorman (1993). Modifications have been made to O'Gorman's algorithm which render very good results at identifying paragraphs and lines in particular. The algorithm implementation can, to a limited degree, describe the logical relationship of the text elements of the original page. The limitations of the algorithm are due to the lack of information available without OCR and font technology incorporated into the algorithm implementation. The algorithm implementation has a graphical interface which portrays the state of the algorithm during the process of decomposition.

Patent
21 Apr 1995
TL;DR: In this paper, the actual page number of a page frame consisting of specified folding and a specified page is computed based on data within the read-out page layout pattern file, data on a page for its actual page numbers is read out from a page data memory, and the page layout of a large page is made at a specified position thereafter.
Abstract: PURPOSE:To provide the device which can process a specified page layout work with specified folding with ease, even if a book and the like include a plurality of different page layout patterns. CONSTITUTION:When folding and a plate are specified, a plate layout pattern file for each folding is read out based on the content of job file description. The actual page number of a page frame consisting of specified folding and a specified page is computed based on data within the read-out page layout pattern file, data on a page for its actual page number is read out from a page data memory means, the rotation of an image in the page, position operation and the like are carried out, the page layout of a large page is made at a specified position thereafter.

Patent
02 May 1995
TL;DR: In this article, a layout file creating and related data generating are used to confirm the correction of layout associated with the change of material data, and a display control is used to judge the order of the creating dates of the layout file and the input date of the material data.
Abstract: PURPOSE:To easily and surely confirm the correction of layout associated with the change of material data. CONSTITUTION:A layout file creating means 201A creates a layout file expressing the layout of the material data inputted from a scanner 202, etc. A related data generating means 201B generates related data expressing the name of the material data, the input date of the material data, and the creating date of the layout file of every layout page. Based on the related data, a display control means 201D judges the order of the creating date of the layout file and the input date of the material data, and displays the layout file which must be corrected on a display 207.

Patent
13 Oct 1995
TL;DR: In this article, the authors propose to shorten design time by verifying timing simulation and the like as against a layout design result and substituting a cell at need based on a verification result.
Abstract: PURPOSE:To shorten design time by verifying timing simulation and the like as against a layout design result and substituting a cell at need based on a verification result. CONSTITUTION:A layout means 1 designing layout by selecting and combining cells registered in a cell library 11, a verification means 3 verifying the layout design result and a re-laying out means 5 substituting the cells at need based on the result of the verification means 3 are provided. The cell library 11 is provided with plural kinds of versions on the cells having the same logical functions. The plural kinds of the versions different in holding time are given to at least flip flop cells. When the inconvenience of timing violation occurs in the design verification of timing simulation and the like after layout is designed, the re-laying out means 5 substitutes the cell being the cause of inconvenience.

Book ChapterDOI
N. Murtagh1
26 Sep 1995
TL;DR: A flexible and easily maintainable system for configuration, using the layout design of an elevator shaft as a practical example, which adapts previous constraint network ideas in order to automate the configuration reasoning.
Abstract: Design of artifacts goes through several different stages as the initial design description is broken down and refined in the process of searching for a solution. One of the important steps in the latter stages of design is configuration. This paper describes a flexible and easily maintainable system for configuration, using the layout design of an elevator shaft as a practical example. To effectively carry out the configuration task, it is necessary to simultaneously consider more than one design level, and to expand the model to include both numeric and symbolic processing. The system discussed here adapts previous constraint network ideas in order to automate the configuration reasoning. While the problem tackled here utilizes only one model of the design process, the possibility to apply the ideas to other models is pointed to.

Book
12 Dec 1995
TL;DR: Justifying a User Manual Style Design Guidelines Page Layout Text Graphics and Tables Overriding the Other Layers Publishing the Book Appendix Index.
Abstract: Justifying a User Manual Style Design Guidelines Page Layout Text Graphics and Tables Overriding the Other Layers Publishing the Book Appendix Index.

Journal ArticleDOI
01 Jun 1995
TL;DR: Progress towards the ideal of electronic paper is reviewed along several dimensions: the technologies, the display surface, the appearance, and the function, such as the page layout, that are currently available and may become possible in the future.
Abstract: Some people have used the phrase ‘electronic paper’ to suggest that electronic information displays may replace the printed page. Progress towards the ideal of electronic paper is reviewed along several dimensions: the technologies, such as the display surface, the appearance, such as the page layout, and the function, such as the styles of interaction, that are currently available and may become possible in the future.

Proceedings ArticleDOI
20 Mar 1995
TL;DR: The fuzzy theory is applied to evaluate layout design plans in the design plan evaluation module in the case-based reasoning (CBR) approach.
Abstract: In this study, we developed a prototype system for electrical equipment layout design In order to acquire the appropriate layout design plans, we utilized the case-based reasoning (CBR) approach Our prototype system consists of 6 executive modules: (1) Problem analysis module, (2) Case retrieval module, (3) Draft layout design module, (4) Design plan evaluation module, (5) Data operation module, (6) Database that includes past layout designs We applied the fuzzy theory to evaluate layout design plans in the design plan evaluation module This paper describes the basic structure and functions of the developed prototype system and some application results >


Patent
13 Oct 1995
TL;DR: In this article, the layout design support device of a semiconductor integrated circuit, which precisely and strictly supports the design of power wiring in a module and a whole chip or the decision of a floor plan on power and which can shorten a design period, is presented.
Abstract: PURPOSE:To provide the layout design support device of a semiconductor integrated circuit, which precisely and strictly supports the design of power wiring in a module and a whole chip or the decision of a floor plan on power and which can shorten a design period. CONSTITUTION:A timewise physical information generation means l generating timewise physical information F2 of various physical amounts which correspond to prescribed input/output signals for respective first design units and in which time is set to be parameters based on first design information F1, a layout decision means 3 deciding a layout in a second design unit based on second design information F3, a simulation means 5 obtaining distribution information F5 of the various physical amounts on the first design units in the layout based on timewise physical information F2 in the first design units and layout information F4 obtained by the layout decision means 3, and an output means 7 outputting distribution drawings for the respective physical amounts from distribution information F5 are provided.

Patent
23 Jun 1995
TL;DR: In this paper, the page specification for the edited document is simplified by switching the display to the edition input screen capable of input control from the position when the edition page and position are specified on a layout display screen.
Abstract: PURPOSE:To simplify the page specification for the edited document by switching the display to the edition input screen capable of input control from the position when the edition page and position are specified on a layout display screen. CONSTITUTION:A word processor 1 consists of a CPU 1, input part 3, document edition part 4, document memory 5, program RAM 6, dictionary memory 7, display control part 8, display buffer 9, display part 10, and printer 11. In the word processor 1, the document layout display screen is changed in a page unit and when the edition position is specified by clicking a left button of a mouse 3a on the specified page layout display screen, the switching display is performed from the layout display screen to the edition screen of the specified page number. Then displaying is controlled so that the user can immediately perform the edition input. Thus, the page and the edition position can be specified while viewing the layout display of the document.

Proceedings ArticleDOI
20 Apr 1995
TL;DR: In this paper, the authors describe a software for performing the mask layout of diffractive optical elements (DOE) based on computer-aided design (CAD) tool developed to speed up the layout process of DOE masks.
Abstract: The paper is a description of a dedicated software for performing the mask layout of diffractive optical elements (DOE). This computer-aided design (CAD) tool is a high productivity tool developed to speed-up the layout process of DOE masks. This utility designs the mask layout, starting from the phase diffraction pattern of DOE expressed as re-usable objects, which are generated by different computing methods and optimization algorithms. The diffraction phase pattern of some frequently used diffraction structures (gratings, lenses), can be computed from the optical parameters entered as input data. The mask layout design can be made for any number of phase levels between 2 and 64, resulting in a set of binary encoding masks. Many DOE functions with the same number of levels can be combined on the same substrate. The mask layout, containing not only the diffractive pattern, but also all the process control patterns needed for manufacturing, is generated in GDS format. The capabilities of this design software are illustrated in an example containing many 4-phase level elements on the same substrate. This CAD mask design software was designed to run on PCs and on SUN Sparc workstations.

Proceedings ArticleDOI
28 Aug 1995
TL;DR: This paper builds a model of constraint-based spatial layout design using a combination of solid modeling and optimization technology, and describes the representation of constraints networks.
Abstract: Spatial layout design is a process of locating components in an available space while satisfying spatial relationships among the components, and the model of spatial layout design is used to determine the optimal locations of components in an assembly from spatial relationships between the components. Because of complicated constraints relations, the previous approaches cannot build an exact mathematical model for spatial layout design problems. This paper presents an approach that is constraint-based spatial layout design using a combination of solid modeling and optimization technology, and builds a model of constraint-based spatial layout design and describes the representation of constraints networks. This approach can overcome the above mentioned defeats. Moreover, the constraint-based model has been applied to the practical use of 'general layout design for heavy duty NC machine tools based on modular design technology' in 'Wuhan Heavy Duty Machine Tool Works (WHDMTW).'© (1995) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Book ChapterDOI
Byung Man Kwak1, Seo Jin Joo1
TL;DR: In this paper, a chip layout optimal design is considered, where chip position with respect to the printed circuit board is the design to be determined, and the concept of material derivative and adjoint system has been used for expressing the layout design sensitivity.
Abstract: A chip layout optimal design is considered, where chip position with respect to the printed circuit board is the design to be determined The concept of material derivative and adjoint system has been used for expressing the layout design sensitivity Introducing a suitable category of design velocity fields, the change of the layout is adequately describable Sensitivities and optimal positions of chips are obtained and discussed

Book ChapterDOI
01 Jan 1995
TL;DR: In this article, the effects of changes in the layout design rules on the manufacturability of a VLSI technology were estimated using a spectrum of TCAD tools, which can estimate the resulting number of good chips per wafer for different sets of design rules, while functional yield was predicted with state-of-the-art yield modeling tools.
Abstract: This paper presents a methodology for estimating the effects of changes in the layout design rules on the manufacturability of a VLSI technology. 2-D process and device simulations were used to estimate parametric yield, while functional yield was predicted with state-of-theart yield modeling tools. A spectrum of TCAD tools was therefore capable of estimating the resulting number of good chips per wafer for different sets of VLSI layout design rules.