Showing papers on "Polysilicon depletion effect published in 1975"

Method of patterning polysilicon

Abstract: A semiconductor substrate is coated with an insulating film followed by a layer of polysilicon. The polysilicon layer is coated with a non-oxidizable mask, such as silicon nitride, and then oxidized to convert the exposed regions to silicon oxide and add further thickness to the converted oxide regions. When the mask is removed, the thicker silicon oxide regions serve as an in situ mask for selectively implanting impurity ions through the thinner polysilicon regions and into the semiconductor substrate. When the silicon oxide regions are etched away, the remaining polysilicon regions serve as an ion implantation mask for permitting selective ion implantation through the voids left by etching the silicon oxide regions.

Fabrication of submicron polysilicon lines by conventional techniques

Abstract: A new method of making fine geometry polysilicon lines has been developed. It requires no special apparatus or critical processing. Silicon gate MOST’s with dimensions of about 1 μm have been fabricated. Applications of the fine geometry MOST’s to the fabrication of high−packing−density MOSIC’s and high−frequency transistors are outlined.

Highly sensitive charge-coupled photodetector including an electrically isolated reversed biased diffusion region for eliminating an inversion layer

Abstract: A solid-state charge-coupled photoconductor for image scanning including a p-type substrate having a silicon dioxide layer on the surface thereof with the exception of one or more areas in which an n+ diffusion area is located. A polysilicon gate is located over the silicon dioxide layer and a second silicon dioxide layer is located over the polysilicon layer and the n+ diffusion area except for a portion where a first aluminum contact window is provided which extends through the second silicon dioxide layer to the surface of the n+ diffusion area and where a second aluminum contact window extends through the second polysilicon gate to the surface of the polysilicon gate. The photosensitivity of the device is electronically controlled due to the relatively small n+ layer which is reversed biased with respect to the larger gate area.