Showing papers on "Timer published in 1992"

Inhalation device with a dose-timer, an actuator mechanism, and patient compliance monitoring means

Abstract: An inhalation device is provided with a mechanism to assure patient compliance with a drug dosage regimen. The control mechanism includes a controller (24), a timer (26), an actuator (28) and a signalling device (30). The controller (24) is programmed or preset with a time and dosage schedule for the drug to be delivered. For example, the controller (24) may be programmed to allow for two puffs from an MDI every eight hours. The actuator (28) operates in conjunction with the timer (26) and prevents the inhalation device from being actuated after the programmed dosage has been administered at the prescribed interval. The actuator (28) could be an electronically controlled valve (58) or pawl (66) arrangement or other suitable mechanism. The signaling device (30) provides an audible, visual or tactile sensation during the time period prescribed for administration of the drug so that the patient is reminded to inhale his or her medicine at the prescribed time intervals. The history of actuation, non-actuation, and improper attempts at actuation can all be recorded and analyzed off-site at a later by a physician, pharmacist, or other authorized health care professional.

Decidability of Bisimulation Equivalences for Parallel Timer Processes

Abstract: In this paper an abstract model of parallel timer processes (PTPs), allowing specification of temporal quantitative constraints on the behaviour of real time systems, is introduced. The parallel timer processes are defined in a dense time domain and are able to model both concurrent (with delay intervals overlapping on the time axis) and infinite behaviour. Both the strong and weak (abstracted from internal actions) bisimulation equivalence problems for PTPs are proved decidable. It is proved also that, if one provides the PTP model additionally with memory cells for moving timer value information along the time axis, the bisimulation equivalence (and even the vertex reachability) problems become undecidable.

Apparatus and method for sensing tampering with a utility meter

Abstract: A device for detecting tampering of a utility meter includes sensors to detect a positional displacement of the meter and loss of power to the meter. On sensing a positional displacement of the meter, indicative of an attempt to remove the meter, a timer is activated to enable sensing a power loss to the meter. In response to detection of a power loss during the time period defined by the timer, an indication is stored in a nonvolatile memory of the tamper event. In response to loss of power with or without a detection of tampering, required parameters including utility consumption data are stored in nonvolatile memory. Remote access to and data retrieval from the nonvolatile memory and system are provided over telephone lines, power lines, or a radio frequency circuit.

Apparatus for insuring the security of output signals from protective relays used in electric power systems

Abstract: In a protective relay (10), which contains a microprocessor (30), for monitoring a power transmission line, an output enable decoder (72) and a one-shot timer (74) produce a very short (5 microsecond) signal in response to an address signal from the microprocessor. The output from the timer is applied as one input to AND gate (70). A conventional address decoder, responsive to an address signal identifying a particular output port from the microprocessor, provides another output to AND gate (70). AND gate (70) produces a latch control signal when the two signals are coincident in time. The latch control signal enables the particular output port to receive instructions from a data bus (60).

Battery disconnect device

Abstract: A device for use in conjunction with a battery in a motor vehicle which is connected to an electrical load. The device includes a microprocessor which iteratively inputs the value of the battery voltage as well as the ambient temperature surrounding the battery. The microprocessor also sets a cut off voltage level which increases proportionately with elapsed time from the last system reset of the device and preferably adjusts the cut off voltage level as a function of the ambient temperature of the battery. The cut off voltage level is set so that when the battery reaches the cut off voltage, sufficient energy remains in the battery for engine ignition, i.e. engine starting. The microprocessor then iteratively compares the battery voltage signal with the cut off voltage level and generates an output signal whenever the battery voltage is less than or equal to the cut off voltage level. The output signal initiates a timer which counts down a relatively short period of time, for example two minutes. At the end of the two minute period and assuming that a system reset did not occur during the activation of the timer, the device generates a battery disconnect signal which disconnects the battery from the electrical load of the vehicle. In this fashion, the device of the present invention ensures that the battery retains sufficient electrical charge or energy for subsequent vehicle ignition. The device also is responsive to an ignition attempt or the activation of a switch on the dashboard of the vehicle to reconnect the electrical load to the battery.

Pulse width modulation signal generating circuit

Abstract: A microcomputer having a signal generating circuit which generates pulse width modulation signals defined by a carrier wave, and which controls controlled portions according to pulse width modulating signals. The signal generating circuit comprises a carrier wave defining timer which outputs a value varying the same as a waveform providing a carrier wave, a control register which controls the time period of the timer, a reload register which holds a count value, control blocks which generate pulse width modulation signals according to the value of the timer and the count value of the reload register.

Circuit breaker with protection against sputtering arc faults

Abstract: A circuit breaker includes an electronic trip device which responds to sputtering arc-type faults. Level detectors compare the current in the protected circuit to a plurality of threshold levels and timers time the intervals that the current remains above each threshold, with the threshold levels and intervals selected to generate a response envelope for a trip signal which approximates, with a selected margin, the response of the protected circuit to introduction of a selected inductive load such as the starting of a motor into the circuit. If the sensed current falls below a threshold level which was being timed, the associated timer is not cleared unless the current falls below the lowest threshold, so that if the sensed current increases above the associated thresholds timing resumes where it left off, and a trip signal wall be generated sooner than for an initial excursion above the threshold. Both analog and digital timer implementations are presented.

Television game console and electronic control device for controlling the allowable playing time of the television game console

Abstract: A television game console has a central processing unit and an electronic control device for controlling the allowable playing time of the television game console. The electronic control device includes a timer control device which interfaces the central processing unit with a game cartridge read only memory unit. The timer control device has a current time clock output and receives a presettable allowable playing time range input from the central processing unit. The timer control device electrically connects the game cartridge read only memory unit and the central processing unit only when the current time clock output is within the allowable playing time range.

Method and apparatus for testing and debugging a tightly coupled mirrored processing system

Abstract: A method and apparatus for operating tightly coupled mirrored processors in a computer system. A plurality of CPU boards are coupled to a processor/memory bus, commonly called a host bus. Each CPU board includes a processor as well as various ports, timers, and interrupt controller logic local to the respective processor. The processors on one or more CPU boards are designated as master processors, with the processors on the remaining CPU boards being designated as mirroring or slave processors. A master processor has full access to the host bus and a second, multiplexed bus for read and write cycles, whereas the slave processors are prevented from writing to any bus. The slave processors compare write data and various control signals with that generated by its respective master processor for disparities. The system includes interrupt controller synchronization logic to synchronize interrupt requests as well as timer synchronization logic to synchronize the timers in each of the master and slave CPUs to guarantee that the master and slave CPUs operate in lockstep.

Weather resistant container for timer components of an irrigation system

Abstract: The invention is a weather resistant container in the nature of a box with tightly fitting cover for a timer unit controlling operation of an irrigation system and associated transformer and electrical plug. The container also houses an electrical receptacle and wiring. Such container is adapted to receive electrical power from an outside source through conventional electrical conduit. Within the box are provided supports for a removable, broad partition wall defining a relatively shallow wiring compartment between the back wall and the partition wall and a relatively deep compartment between the partition wall and open front of the box for housing the timer components.

Auto selecting scrolling device

Abstract: An auto selecting scrolling device is an improved user interface for viewing and making selection of a parameter from a menu. When a device, used to scroll through a menu, is activated the menu appears. A timer with user preset time limit is started. As long as the scrolling device is being used to scroll through the parameters in the menu, the timer is reset. While the scrolling is taking place the parameters are not only highlighted but also magnified. If the menu is no longer being scrolled through, then the timer expires upon attaining the user set limit. When the timer expires, the last highlighted parameter is selected and the menu is closed.

DC motor speed control system

Abstract: A speed controller for a DC motor minimizes speed droop and load droop through pulse width or frequency modulation. The controller provides an extra power increase upon engine starting or whenever a heavier load is temporarily encountered. The control circuit also has a current limiter, overload indicators, and a battery recharger. The controller is very inexpensive, primarily because all of the timing components are contained on a single integrated circuit timer chip such as a 556 timer. The controller contains other features, including a circuit for limiting the pulse width of the control signal from the pulse width modulator.

Watchdog timer with a non-masked interrupt masked only when a watchdog timer has been cleared

Abstract: A microcomputer comprises a central processing unit, a watchdog timer generating a watchdog timer processing request when an overflow occurs in the watchdog timer, and an interrupt controller processing as a non-maskable interrupt the watchdog timer processing request generated by the watch timer. The central processing unit generates a preset signal to the watchdog timer at a beginning of execution of another interrupt processing by the central processing unit, so as to preset the watchdog timer. The interrupt controller responds to the preset signal for cancelling the watchdog timer processing request generated by the watchdog timer in a period of time of retaining the watchdog timer processing request by the interrupt controller.

Method and system for error recovery for cascaded servers

Abstract: An improved method for error recovery in client-server distributed processing systems using cascaded servers. The method adds an additional form of acknowledgement message from a server to its predecessor. This message is sent when the server has completed all its processing and has received an ACK message from its successor, indicating that its result has been successfully received by the successor. The predecessor server retains a copy of its results until it receives the done message, at which time the copy of the results is discarded. If a done message is not received by the time a timer has expired, indicating that a problem has occurred with a server or its communications, the predecessor server resends its stored results.

Critical incident recorder

Abstract: A portable, continuous loop, microchip recording device which stores sound prior to and for a preset period after a timer is triggered by either a manual switch, a preprogrammed acoustical signature, or when a preset decibel or pressure level is reached.

Self-refreshing memory with on-chip timer test circuit

Abstract: A self-refreshing memory has a refresh timer that generates refresh requests at a certain rate, and a refresh address counter that generates refresh addresses by counting the refresh requests. A refresh test circuit receives test signals from automatic test equipment that cause it to disable the refresh timer, reset the refresh address counter, then enable the refresh timer for a certain interval. At the end of this interval the refresh test circuit disables the refresh timer again and generates an output signal such as a serial data signal indicating the current refresh address, or a pass-fail signal indicating whether the refresh address is equal to or greater than a preset pass value.

State machine having a variable timing mechanism for varying the duration of logical output states of the state machine based on variation in the clock frequency

Abstract: A finite state machine has outputs variable between a finite number of logical outputs states. A clock provides a clock signal having clock pulses, with a frequency, to the state machine. A functional circuit determines the logical output states of the state machine based on state inputs to the functional circuit. A variable timer is coupled to the clock and the functional circuit. The variable timer controls the duration of each logical output state to adjust for changes in the clock frequency based on timing parameters provided to the variable timer. The variable timer varies a number of clock pulses corresponding to each logical output state so the duration of each logical output state remains within a predetermined time limit.

Syringe apparatus with attached pressure gauge and timer

Abstract: A syringe apparatus for use with balloon-tipped catheters is disclosed having an attached pressure gauge and timer assembly. In one mode, the timer assembly displays the duration of a current event of inflation or deflation, and the duration of the most recent past event of inflation or deflation. In another mode, the timer assembly displays historical information showing the event number and duration of past events of inflation and deflation. The pressure gauge display and the timer assembly display are situated conveniently on the syringe assembly and in proximity to one another so as to enable a syringe operator to substantially simultaneously monitor durations of inflation and deflation without the need for an assistant, yet without requiring purchase or use of computerized monitors.

Picosecond event timer

Abstract: A circuit for time stamping event signals, e.g. zero-crossings, using coarse and fine timers. The fine timer (15) is a circuit section which subdivides a period from a phase-locked ring-oscillator (13) into 2N subparts (39). An event signal is timed by latching a digital representation of a particular subpart. The digital representation of the subpart is an N-bit dual thermometer code (41) which uniquely identifies each subpart with each adjacent subpart differing by only one bit. The subparts are made finer in time quantization than the propagation delay of one active element in the ring oscillator (13) by the use of linear combiner elements (71, 73, 75). The dual thermometer code (41), encoded post-latching into a binary code, forms the "fine" timing part of a binary word representation of the event time. The event (11) also latches the count states of a pair of lead-lag counters (150, 151) in a master-slave configuration counting ring oscillator periods. These counters change states respectively before and after the dual thermometer code turn-overs. Only one reading is chosen for recording as determined by the most significant bit of the fine code. The choice will always find an accurate and stable reading, and reject erroneous readings resulting from reading a counter in transition. The chosen counter reading, encoded to binary, forms the coarse timer (17) for the binary word representation of the event time. The coarse and fine binary words are butt-joinable to form the complete binary timing representation without further arithmetic processing.

Remote display of patient monitored data

Abstract: Apparatus for remotely displaying the inflation pressure within an inflator (11) for inflating a balloon catheter. The apparatus comprises a pressure transducer (40) positioned to sense pressure within the syringe, a transmission unit (502) receiving a pressure signal from the transducer and transmitting by means of infrared light pulse sequences, a pressure message reflective of the pressure signal. A monitor (500) positionable at a distance from the transmission unit receives and decodes the pressure messages, and provides a display thereof. A timer key (518) for initiating the transmission of start/stop clock messages is located on the inflator unit. The monitor further includes a timer responsive to received clock messages, and an elapsed time display (520).

Electrical metering device and associated method for temporarily storing data during transmission of the data to a remote communications device

Abstract: In one embodiment, the present invention is an algorithm implemented in a microprocessor-controlled system which, for example, is disposed within an energy meter housing. Particularly, the microprocessor is coupled to a communications interface which receives and transmits messages on a power line or some other external communications media. Upon receipt of a message, the commands contained in the message are read. If a command corresponds to a "buffer and lock" command, then a timer operated by the microprocessor starts to run. For example, if data to be retrieved from the system is data which is erased from system memory when read therefrom, just prior to reading such data, a buffer and lock command is transmitted by the external communication device. Upon receipt of such command, the microprocessor initiates running of a timer and the data is read from the meter. The data also is copied to a buffer, e.g., a RAM memory location. If the data is "lost" during transmission, and as long as the timer is running, the data can be copied from the designated buffer and re-transmitted. In this manner, data normally not saved in a meter subsequent to a read operation is saved and, if necessary, re-transmitted.

Power conserving receiver operation for a remote electronic display system

Abstract: An information display system is provided having a transmitter and a plurality of uniquely identified display terminals, each terminal having an IR receiver. Uniquely identified sets of messages are transmitted in by the IR transceiver for reception by the display terminals. Between each set of transmissions, the receiver is periodically activated. Once the presence of a transmission is sensed by the receiver, a timer forces the receiver to remain activated while it compares the uniquely identified received messages to the display terminals unique identification. The receiver stores the message that matches the identification of the display terminal and the timer forces the receiver to remain deactivated at least until the entire set of transmissions has been completed.

IC card having a monitor timer and a reset signal discrimination circuit

Abstract: An IC card includes a CPU for processing data, a data receiving circuit for receiving data and inputting the data to the CPU, a data transmitting circuit for transmitting data from the CPU, a reset receiving device for receiving an external reset signal, a monitor timer for generating a timer reset signal when there is no response after a prescribed time has elapsed following receipt of data by the data receiving circuit, and a discrimination circuit for determining which of the external reset signal or a timer reset signal from the monitor timer has been received, holding the determination, and resetting the CPU in response to a reset signal.

Semiconductor memory device having self-refresh and back-bias circuitry

Abstract: A semiconductor memory device includes a refresh timer for generating a refresh clock pulse, a binary counter for generating a predetermined number of signals of different frequencies and a circuit for generating a self-refresh enable signal in response to the signal transmitted from the binary counter. A back-bias clock pulse generator is also included having first, second and third selectors, of which the third selector selects one of the signals transmitted from the binary counter in response to a signal output from each of the first and second selectors. A back-bias generator having an oscillator and a back-bias voltage detecting circuit and a selection circuit for receiving the output signal from the back-bias voltage detection circuit is attached thereto. A signal is transmitted to the oscillator in response to the self-refresh enable signal. The oscillator output, together with the output of the back-bias control pulse generator, cause a driver control circuit to feed a drive signal to a charge pump during a self-refresh operation.

Method and apparatus for detecting direction and speed using PIR sensor

Abstract: A dual pyroelectric-effect sensor having the sensing elements aligned in a motion plane permits direction determinations to be made for moving IR sources. Dual sensing-element PIR sensors provide different voltage outputs depending upon a relative direction of movement of an object and the sensing elements. By alternating the effective polarizations of the sensing elements in the PIR sensor, clear direction information is available from the PIR sensor. A direction detecting circuit working in cooperation with a switch controller employing a counter and a timer, permits independent tallying of entrances and exits. Upon the counter indicating that the number of objects that exited the area equals the number of objects that entered, the lights are immediately extinguished. The timer ensures that the lights turn off should incorrect values become recorded in the counter.

Accounting system in network for offering video programs

Abstract: In an accounting system in a B-ISDN offering video programs to a plurality of subscriber terminals coupled thereto, a timer, and an account controller are provided in each of the subscriber terminals. The timer starts to count time when a subscriber terminal receives a video program offered from the network. The account controller determines whether or not a count time in the timer has reached n sec. (e.g. 300 sec.), and transmits account starting information to the network when it is determined the count time in the timer has reached n sec.. The account controller also transmits account termination information to the network when the subscriber terminal discontinues receipt of the video program. The network is provided with an accounting unit for performing a accounting process with respect to each of the subscriber terminals from which the account starting information and the account termination information are transmitted, the accounting process starting from a time at which the network receives the account starting information to a time at which the network receives the account termination information.

Warning timer for users of interactive systems

Abstract: A warning timer adapted for use in an interactive data processing system which generates an alarm when a user receives output at an input/output device when he or she is not likely to be paying attention to the input/output device. The user is assumed to be paying attention for a specified amount of time after he or she last sent a request to a computer or received a response from the computer. The specified amount of time corresponds to the length of the user's attention span. The warning timer operates as follows. When the user receives a response, it calculates the amount of time that has elapsed since the user last sent a request or received a response If the elapsed time exceeds the specified amount of time, it generates an alarm to alert the user.

Information processing systems having a main CPU and a sub-CPU which controls the overall system to achieve power savings

Abstract: An information processing system in which a sub-CPU is provided besides a main CPU to carry out those kinds of processing and power supply control that may be executed at time intervals of a short period, so that the power consumption of the information processing system can be reduced without lowering the processing speed of the information processing system. The sub-CPU of a type operating at a low speed, driven by a low voltage and consuming a small amount of power carries out those kinds of processing including monitoring an input from a keyboard, counting the output of a timer and monitoring and controlling a power supply control circuit, and, during waiting arrival of a key input, the main CPU is placed in its halt mode consuming a very small amount of power. The sub-CPU instructs to selectively turn off the power supply for an input/output unit not in use among a display unit, a modem, an FDD, an extension slot, etc., whereby the power consumption of the information processing system can be reduced without lowering the processing speed of the information processing system.

Timer circuit including an analog ramp generator and a CMOS counter

Abstract: A timer circuit provides a wide range of precise and substantially accurate time intervals. The timer circuit includes a ramp generator circuit having a first input for receiving an input signal to start a ramp signal, a second input for receiving a ramp timing control signal, and an output for providing a ramp signal. A comparator has a first input coupled to the output of the ramp generator, a second input coupled to a reference voltage source, and an output for providing an end ramp signal. A counter circuit has a first input for receiving the end ramp signal to begin counting, a second input for receiving a counter timing control signal, and an output for providing a terminal count signal. The end ramp signal and the terminal count signal are combined in an AND gate to provide a signal that is delayed by a predetermined amount from the input signal.

Liquid crystal display apparatus

Abstract: In a liquid crystal driving apparatus for driving a liquid crystal display panel in accordance with an image signal, the response speed of a liquid crystal display panel is increased so as not to produce an afterimage upon motion image display. A signal is preprocessed by an inverse transfer function of the transfer function of the liquid crystal panel, i.e., signal processing for emphasizing an image change in a timer direction is performed, and the liquid crystal display panel is driven by using the processed data.