The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

http://science.sciencemag.org/content/sci/311/5758/208.full.pdf

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

Pattern Transfer Printing by Kinetic Control of Adhesion to an Elastomeric Stamp

The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems.

Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates

Theoretical models of Schottky-barrier height formation are reviewed. A particular emphasis is placed on the examination of how these models agree with general physical principles. New concepts on the relationship between interface dipole and chemical bond formation are analyzed, and shown to offer a coherent explanation of a wide range of experimental data.

Recent advances in Schottky barrier concepts

The formation of the Schottky barrier height (SBH) is a complex problem because of the dependence of the SBH on the atomic structure of the metal-semiconductor (MS) interface. Existing models of the SBH are too simple to realistically treat the chemistry exhibited at MS interfaces. This article points out, through examination of available experimental and theoretical results, that a comprehensive, quantum-mechanics-based picture of SBH formation can already be constructed, although no simple equations can emerge, which are applicable for all MS interfaces. Important concepts and principles in physics and chemistry that govern the formation of the SBH are described in detail, from which the experimental and theoretical results for individual MS interfaces can be understood. Strategies used and results obtained from recent investigations to systematically modify the SBH are also examined from the perspective of the physical and chemical principles of the MS interface.

The physics and chemistry of the Schottky barrier height

This work presents an attempt related to the charging behaviour of interface states to the nonideal forward bias current-voltage (I-V) and the reverse bias capacitance-voltage (C-V) characteristics of AlnSi Schottky barrier diodes. The diode showed nonideal I-V behaviour with an ideality factor of 1.50 and was thought to have a metal-interface layer-semiconductor configuration. Considering that the interface states localized at the interfacial layer-semiconductor interface are in equilibrium with the semiconductor, the energy distribution of the interface states was exactly determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height, θe. The determination of the intercept voltage and interface state density was made by means of a simple interface charge model which has been developed in detail. The I-V characteristics were used for determining the voltage dependence of the barrier height. Although the change in barrier height with applied biasis small, it is important for exactly determining the shape of the interface state density distribution curve. At a frequency of 500 kHz, the nonlinear reverse bias C−2−V plot with the curvature concave downward has been only thought of to be due to the contribution of the capacitance of the interface state charges. It is concluded that the nonlinear nature of C−2−V plots in the frequency range 50–200 kHz has been caused by the interface state charges as well as inversion layer and inversion layer charges. It has been understood by means of the interface state charge model that the C−2−V plots cannot only be interpreted in terms of the contribution of the interface state charges to the device capacitance.

Interpreting the nonideal reverse bias c-v characteristics and importance of the dependence of schottky-barrier height on applied voltage

We report the current-voltage (I-V) and capacitance-voltage characteristics (C-V) of Ni/n-GaN Schottky diodes Gallium nitride is a highly promising wide band gap semiconductor for applications in high power electronic and optoelectronic devices which require Schottky barriers for modulating the channel mobile charge The I-V and C-V characteristics of the diodes have been measured in the temperature range of 80–400 K with steps of 20 K Thermal carrier concentration and barrier height versus temperature plots have been obtained from the C−2-V characteristics, and a value of α=−140 meV/K for temperature coefficient of the barrier height The modified activation energy plot according to the barrier inhomogeneity model has given the Richardson constant A∗ as 80 or 85 A/(cm2 K2)

On temperature-dependent experimental I-V and C-V data of Ni/n-GaN Schottky contacts

The nonpolymeric organic compound rhodamine-101 (Rh101) film on a n-type Si or p-type Si substrate has been formed by means of the evaporation process and the Sn/rhodamine-101/Si contacts have been fabricated. The Sn∕Rh101∕n-Si and Sn∕Rh101∕p-Si contacts have rectifying contact behavior with the barrier height (BH) values of 0.714 and 0.827eV, and with ideality factor values of 2.720 and 2.783 obtained from their forward bias current-voltage (I-V) characteristics at room temperature, respectively. It has been seen that the BH value of 0.827eV obtained for the Sn∕Rh101∕p-Si contact is significantly larger than BH values of the conventional Sn∕p-Si Schottky diodes and metal/interfacial layer/Si contacts. Thus, modification of the interfacial potential barrier for metal/Si diodes has been achieved using a thin interlayer of the Rh101 organic semiconductor; this has been ascribed to the fact that the Rh101 interlayer increases the effective barrier height by influencing the space charge region of Si.

Current-voltage and capacitance-voltage characteristics of Sn/rhodamine-101∕n-Si and Sn/rhodamine-101∕p-Si Schottky barrier diodes

Some electrical properties of polyaniline/p-Si/Al structure at 300K and 77K temperatures

In order to make an accurate determination of Schottky diode parameters such as the ideality factor, the barrier height and the series resistance [using forward current-voltage ( I - V ) characteristics in the presence of an interfacial layer], a novel calculation method has been developed by taking into account the applied voltage drop across the interfacial layer ( V i ). The parameters obtained by accounting for the voltage drop V i have been compared with those obtained without considering the above voltage drop. To examine the consistency of this approach, the comparison has been made by means of Schottky diodes fabricated on a n -type semiconductor substrate with different bulk thickness. It is shown that the voltage drop across the interfacial layer will increase the ideality factor and the voltage dependence of the I - V characteristics. In addition, it is shown that the series resistance value increases as the semiconductor bulk thickness has been increased.

Abdulmecit Türüt

Papers

Interpreting the nonideal reverse bias c-v characteristics and importance of the dependence of schottky-barrier height on applied voltage

On temperature-dependent experimental I-V and C-V data of Ni/n-GaN Schottky contacts

Current-voltage and capacitance-voltage characteristics of Sn/rhodamine-101∕n-Si and Sn/rhodamine-101∕p-Si Schottky barrier diodes

Some electrical properties of polyaniline/p-Si/Al structure at 300K and 77K temperatures

Effect of series resistance on the forward current-voltage characteristics of Schottky diodes in the presence of interfacial layer