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Alejandro López-Ortiz
Researcher at University of Waterloo
Publications - 198
Citations - 3856
Alejandro López-Ortiz is an academic researcher from University of Waterloo. The author has contributed to research in topics: Competitive analysis & List update problem. The author has an hindex of 33, co-authored 193 publications receiving 3719 citations. Previous affiliations of Alejandro López-Ortiz include Open Text Corporation & University of New Brunswick.
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Proceedings ArticleDOI
Faster and smaller inverted indices with treaps
TL;DR: This work introduces a new representation of the inverted index that performs faster ranked unions and intersections while using less space, and performs queries up to three times faster, than state-of-the-art compact representations.
Proceedings ArticleDOI
The cost of cache-oblivious searching
Michael A. Bender,Gerth Stølting Brodal,Rolf Fagerberg,Dongdong Ge,Simai He,Haodong Hu,John Iacono,Alejandro López-Ortiz +7 more
TL;DR: It is shown that for a multilevel memory hierarchy, a simple cache-oblivious structure almost replicates the performance of an optimal parameterized k-level DAM structure, and it is demonstrated that as k grows, the search costs of the optimal k- level DAM search structure and the optimal cache-OBlivious search structure rapidly converge.
Proceedings Article
Multi-pivot quicksort: theory and experiments
TL;DR: This work performs the previous experiments using a native C implementation thus removing potential extraneous effects of the JVM, and provides analyses on cache behavior of the dual pivot quicksort algorithm and proposes a 3-pivot variant that performs very well in theory and practice.
Journal ArticleDOI
On Minimum- and Maximum-Weight Minimum Spanning Trees with Neighborhoods
Reza Dorrigiv,Robert Fraser,Meng He,Shahin Kamali,Akitoshi Kawamura,Alejandro López-Ortiz,Diego Seco +6 more
TL;DR: Deterministic and parameterized approximation algorithms for the max-MSTN problem, and a parameterized algorithm for the MSTn problem are provided, and hardness of approximation proofs for both settings are presented.
Proceedings ArticleDOI
Multi-queued network processors for packets with heterogeneous processing requirements
TL;DR: A simplified architecture for priority queueing by remaining processing and the push-out mechanism simultaneously in an NP is designed and worst-case guarantees for its throughput performance in different settings are provided.