Behnam Mohammadi

TL;DR: A low-power, multimode polar transmitter based on a two-point injection PLL with a linearized VCO is implemented in 65-nm CMOS technology that linearizes and accurately controls the tuning characteristic of the VCO, which is a key requirement when directly modulating the oscillator.

TL;DR: The paper addresses the challenges of realizing a complete GSM/EDGE SoC with the RF integrated along with the rest of digital baseband circuitry, and presents a very low-cost and low-power 2.5G radio while meeting the stringent cellular requirements with wide margin.

TL;DR: In this paper, a pull-up circuit is proposed to reduce the effect of switch capacitance on the frequency range of an inductor-capacitor tank containing the switched capacitor array.

TL;DR: This transceiver is implemented in low-cost digital 0.13 mum CMOS, achieves a superior receive and transmit performance, and yet has up to 2x lower receive power consumption, a key requirement in cellular applications.

TL;DR: A receiver capable of receiving three simultaneous cellular channels with an aggregate bandwidth of 60 MHz, enabling a 300 Mb/s downlink rate, and consumes 13.7 and 17.6 mA in 3G and LTE modes.