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Showing papers by "Bobby Brar published in 2008"


Journal ArticleDOI
16 Jan 2008
TL;DR: This work describes device and circuit bandwidth limits associated with HBTs, develops scaling roadmaps for H BTs having lithographic minimum feature sizes between 512 and 64 nm, and identifies key technological challenges in realizing 480-GHz digital ICs and 1000-GHz amplifiers.
Abstract: Indium phosphide heterojunction bipolar transistors (HBTs) find applications in very wide-band digital and mixed-signal integrated circuits (ICs). Devices fabricated in high-yield process flows at 500 nm feature size obtain 450 GHz cutoff frequencies and 5 V breakdown and enable high yield fabrication of integrated circuits having more than 3000 transistors. Laboratory devices at 250 nm feature size obtain 755 GHz . We describe device and circuit bandwidth limits associated with HBTs, develop scaling roadmaps for HBTs having lithographic minimum feature sizes between 512 and 64 nm, and identify key technological challenges in realizing 480-GHz digital ICs and 1000-GHz amplifiers. Key features of manufacturable self-aligned dielectric sidewall processes are described in detail.

121 citations


Proceedings ArticleDOI
25 May 2008
TL;DR: In this article, an advanced InP double heterojunction bipolar transistor (DHBT) technology was developed that utilizes electroplated device contacts and dielectric sidewall spacers to form a self-aligned base-emitter junction.
Abstract: We report on the development of an advanced InP double heterojunction bipolar transistor (DHBT) technology that utilizes electroplated device contacts and dielectric sidewall spacers to form a self-aligned base-emitter junction. These processes permit aggressive scaling of the transistor, while achieving high levels of yield and manufacturability. HBTs with 0.5 mum emitter junction widths have been demonstrated with an ft/fmax of 405/390 GHz and a common-emitter breakdown voltage BVCEO >4 V. Large-scale direct digital synthesizer (DDS) circuits have been fabricated operating at clock rates up to 24 GHz.

26 citations


Journal ArticleDOI
TL;DR: In this paper, an enhancement mode metamorphic high-electron-mobility transistor device on a GaAs substrate with a 70% indium composition channel is presented, which exhibits a 490GHz current gain cutoff frequency (fT), a transconductance (gm) of 2 S/mm, a threshold voltage (Vth) of 0.11 V (enhancement mode) and a low on-resistance of O(37 Omega mm.
Abstract: This letter presents the results of an enhancement mode metamorphic high-electron-mobility transistor device on a GaAs substrate with a 70% indium composition channel. A 35-nm gate length device exhibits a 490-GHz current gain cutoff frequency (fT), a transconductance (gm) of 2 S/mm, a threshold voltage (Vth) of 0.11 V (enhancement mode) and a low on- resistance of 0.37 Omega mm. These attributes make the device well- suited for millimeter-wave circuit applications.

15 citations


Proceedings ArticleDOI
17 Nov 2008
TL;DR: In this article, the feasibility of developing bipolar transistors with current-gain and power-gain cutoff frequencies of 1-3 THz was examined, and contact resistivities with resistivity sufficient for the 64 nm scaling generation (1 THz ftau2 THz fmax) were developed.
Abstract: We examine the feasibility of developing bipolar transistors with current-gain and power-gain cutoff frequencies of 1-3 THz. High bandwidths are obtained by scaling; the critical limits to such scaling are the requirements that the current density increase in proportion to the square of bandwidth and that the metal-semiconductor contact resistivities vary as the inverse square of device bandwidth. Transistors with 755 GHz fmax and 324 GHz amplifiers have been demonstrated. Contacts with resistivity sufficient for the 64 nm scaling generation (1 THz ftau2 THz fmax) have been developed.

10 citations


Proceedings ArticleDOI
30 Dec 2008
TL;DR: In this article, the authors present a substrate platform, processes, and devices for the monolithic integration of silicon CMOS circuits with III-V optical and electronic devices, including visible LEDs and InP HBTs.
Abstract: We summarize our work on creating substrate platforms, processes, and devices for the monolithic integration of silicon CMOS circuits with III-V optical and electronic devices. Visible LEDs and InP HBTs have been integrated on silicon materials platforms that lend themselves to process integration within silicon fabrication facilities. We also summarize research on tensile Ge, which could be a high mobility material for III-V MOS, and research on an in-situ MOCVD Al2O3/GaAs process for III-V MOS.

7 citations


01 Jan 2008
TL;DR: The Substrate-Driven FET (SDFET) as mentioned in this paper is a GaAs switch that has a gate width of 1 meter, specific onresistance of 0.26m Ω-cm 2, and turn-on and turnoff transitions less than 1nsec.
Abstract: The development and demonstration of a novel GaAs switch called Substrate-Driven FET (SDFET) is reported in this paper. The SD-FET process is compatible with standard large volume pHEMT processes and the device has far superior switching properties compared to state-of-the-art Si devices. This combination of cost effectiveness and excellent performance makes the SD-FET vital for meeting the challenging power requirements of next generation portable applications. Devices with current capability of 20A with a gate width of 1 meter, specific onresistance of 0.26m Ω-cm 2 , and turn-on and turnoff transitions less than 1nsec have been demonstrated. Power losses due to conduction, gate charge, output capacitance and switching transitions are lower than that of commercially available state-of-the-art Si devices, thereby validating the capability of the SD-FET in enabling compact and highly efficient power conversion. The performance of the SD-FET in a multiphase buck converter application was analyzed showing at least 9 percentage points improvement in efficiency over an equivalently rated Si-based counterpart.

2 citations



Proceedings ArticleDOI
25 May 2008
TL;DR: In this article, the MBE growth of InP-based HBTs on GeOI/Si substrates is described, where a GaAs buffer is nucleated on the geOI; then a graded InAlAs metamorphic buffer transitions the lattice constant to InP.
Abstract: MBE growth of InP-based HBTs on GeOI/Si substrates is described. A GaAs buffer is nucleated on the GeOI; then a graded InAlAs metamorphic buffer transitions the lattice constant to InP. TEM shows minimal anti-phase boundaries and limited dislocations propagating into the device layers. Large area DC parameters are similar to LM HBTs grown on InP. Small area devices exhibit peak current gain cutoff frequency (ft) of 170 GHz at 2 mA/mum2 nominal collector current density. Initial work involving selective epitaxial growth on patterned Ge substrates for future integration is also discussed.