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Charles E. Leiserson
Researcher at Massachusetts Institute of Technology
Publications - 190
Citations - 50798
Charles E. Leiserson is an academic researcher from Massachusetts Institute of Technology. The author has contributed to research in topics: Cilk & Scheduling (computing). The author has an hindex of 65, co-authored 185 publications receiving 49312 citations. Previous affiliations of Charles E. Leiserson include Vassar College & Carnegie Mellon University.
Papers
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Book ChapterDOI
Provably efficient two-level adaptive scheduling
TL;DR: Because the length of the scheduling quantum can be adjusted to amortize the cost of context-switching during processor reallocation, the two two-level schedulers provide control over the scheduling overhead and ensure effective utilization of processors.
Book
The organization of permutation architectures with bused interconnections
TL;DR: In this article, the problem of efficiently permuting data stored in VLSI chips in accordance with a predetermined set of permutations is explored, and it is shown that the number of pins per chip can often be reduced.
Communication-efficient parallel graph algorithms
TL;DR: This paper measures the communication requirements of an algorithm in a model called the distributed random-access machine (DRAM), in which communication cost is measured in terms of the congestion of memory accesses across cuts of an underlying network.
Proceedings ArticleDOI
On-the-fly pipeline parallelism
TL;DR: A provably efficient scheduling algorithm, the Piper algorithm, is described, which integrates pipeline parallelism into a work-stealing scheduler, allowing pipeline and fork-join parallelism to be arbitrarily nested and automatically throttles the parallelism, precluding "runaway" pipelines.