Storage-class memory (SCM) combines the benefits of a solid-state memory, such as high performance and robustness, with the archival capabilities and low cost of conventional hard-disk magnetic storage. Such a device would require a solid-state nonvolatile memory technology that could be manufactured at an extremely high effective areal density using some combination of sublithographic patterning techniques, multiple bits per cell, and multiple layers of devices. We review the candidate solid-state nonvolatile memory technologies that potentially could be used to construct such an SCM. We discuss evolutionary extensions of conventional flash memory, such as SONOS (silicon-oxide-nitride-oxide-silicon) and nanotraps, as well as a number of revolutionary new memory technologies. We review the capabilities of ferroelectric, magnetic, phase-change, and resistive random-access memories, including perovskites and solid electrolytes, and finally organic and polymeric memory. The potential for practical scaling to ultrahigh effective areal density for each of these candidate technologies is then compared.

Overview of candidate device technologies for storage-class memory

Storage-class memory (SCM) combines the benefits of a solidstate memory, such as high performance and robustness, with the archival capabilities and low cost of conventional hard-disk magnetic storage. Such a device would require a solid-state nonvolatile memory technology that could be manufactured at an extremely high effective areal density using some combination of sublithographic patterning techniques, multiple bits per cell, and multiple layers of devices. We review the candidate solid-state nonvolatile memory technologies that potentially could be used to construct such an SCM. We discuss evolutionary extensions of conventional flash memory, such as SONOS (silicon-oxide-nitrideoxide-silicon) and nanotraps, as well as a number of revolutionary new memory technologies. We review the capabilities of ferroelectric, magnetic, phase-change, and resistive random-access memories, including perovskites and solid electrolytes, and finally organic and polymeric memory. The potential for practical scaling to ultrahigh effective areal density for each of these candidate technologies is then compared.

https://researcher.watson.ibm.com/researcher/files/us-gwburr/NVMcandidates_IBMJRD.pdf

Overview of candidate device technologies for storage-class

This study investigates bipolar and nonpolar resistive-switching of HfO2 with various metal electrodes. Supported by convincing physical and electrical evidence, it is our contention that the composition of conducting filaments in HfO2 strongly depends upon the metal electrodes. Nonpolar resistive-switching with the Ni electrode is attributed to the migration of metal cations and the corresponding electrochemical metallization. Conversely, oxygen-deficient filaments induced by anion migration are responsible for bipolar resistive-switching. It was also found that the characteristic nature of the conducting filaments influences many aspects of switching characteristics, including the switching power, cycling variations, and retention at elevated temperatures.

Electrode dependence of filament formation in HfO2 resistive-switching memory

A microelectronic unit is provided in which front and rear surfaces of a semiconductor element may define a thin region which has a first thickness and a thicker region having a thickness at least about twice the first thickness. A semiconductor device may be present at the front surface, with a plurality of first conductive contacts at the front surface connected to the device. A plurality of conductive vias may extend from the rear surface through the thin region of the semiconductor element to the first conductive contacts. A plurality of second conductive contacts can be exposed at an exterior of the semiconductor element. A plurality of conductive traces may connect the second conductive contacts to the conductive vias.

Chips having rear contacts connected by through vias to front contacts

The Resistive Random Access Memory (RRAM) is a new type of non-volatile memory based on the resistive memory device. Researchers are currently moving from resistive device development to memory circuit design and implementation, hoping to fabricate memory chips that can be deployed in the market in the near future. However, so far the low manufacturing yield is still a major issue. In this paper, we propose defect and fault models specific to RRAM, i.e., the Over-Forming (OF) defect and the Read-One-Disturb (R1D) fault. We then propose a March algorithm to cover these defects and faults in addition to the conventional RAM faults, which is called March C*. We also develop a novel squeeze-search scheme to identify the OF defect, which leads to the Stuck-At Fault (SAF). The proposed test algorithm is applied to a first-cut 4-Mb HfO
 2
-based RRAM test chip. Results show that OF defects and R1D faults do exist in the RRAM chip. We also identify specific failure patterns from the test results, which are shown to be induced by multiple short defects between bit-lines. By identifying the defects and faults, designers and process engineers can improve the RRAM yield in a more cost-effective way.

RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme

Nonstoichiometric hafnium oxide (HfOx) resistive-switching memory devices with low-power operation have been demonstrated. Polycrystalline HfOx (O:Hf=1.5:1) films with a thickness of 20 nm are grown on a titanium nitride (TiN) bottom electrode by commercial atomic layer deposition. Platinum (Pt) as a top electrode is used in the memory device. Voltage-induced resistance switching is repeatedly observed in the Pt/HfOx/TiN/Si memory device with resistance ratio is greater than 10. During the switching cycles, the power consumptions for high- and low-resistance states are found to be 0.25 and 0.15 mW, respectively. At 85 °C, the memory device shows stable resistance switching and superior data retention with resistance ratio is greater than 100. In addition, our memory device shows little area dependence of resistance-switching behavior. The anodic electrode containing noble metal Pt serves an important role in maintaining stable resistance switching. The resistance switching in the HfOx films is thought to be due to the defects that are generated by the applied bias. The nonstoichiometric HfOx films are responsible for the low SET and RESET currents during switching. Our study shows that the HfOx resistive-switching memory is a promising candidate for next-generation nonvolatile memory device applications.

https://iopscience.iop.org/article/10.1143/JJAP.46.2175/pdf

Low-Power Switching of Nonvolatile Resistive Memory Using Hafnium Oxide

A resistive random access memory and a method for fabricating the same are provided. The method includes forming a bottom electrode on a substrate; forming a metal oxide layer on the bottom electrode; forming an oxygen atom gettering layer on the metal oxide layer; forming a first top electrode sub-layer on the oxygen atom gettering layer; forming a second top electrode sub-layer on the first top electrode sub-layer, wherein the first top electrode sub-layer and the second top electrode sub-layer comprise a top electrode; and subjecting the metal oxide layer and the oxygen atom gettering layer to a thermal treatment, driving the oxygen atoms of the metal oxide layer to migrate into and react with the oxygen atom gettering layer, resulting in a plurality of oxygen vacancies within the metal oxide layer.

Resistive random access memory and method for fabricating the same

A method of manufacturing through-silicon-via (TSV) and a TSV structure are provided. The TSV structure includes a silicon substrate, an annular capacitor, a conductive through-via, a layer of low-k material, and a bump. The annular capacitor is within the silicon substrate and constituted of a first conductive layer, a capacitor dielectric layer, and a second conductive layer from the inside to the outside. The conductive through-via is disposed in the silicon substrate surrounded by the annular capacitor, and the layer of low-k material is between the annular capacitor and the conductive through-via. The bump is in touch with the conductive through-via for bonding other chip.

Method of manufacturing through-silicon-via and through-silicon-via structure

The materials properties and resistance switching characteristics of hafnium oxide-based binary oxide were investigated for next generation memory device application. A nonstoichometric hafnium oxide (HfOx) film with a mixture structure of monoclinic and tetragonal phase and some metallic Hf-Hf bonds on TiN/Si were prepared by atomic layer chemical vapor deposition (ALCVD). Resistance random access memory devices consisting of Pt/HfOx/TiN/Si with low power operation (< 0.4 mW) and reset current (< 100 mA) were fabricated. The resistance ratio of high resistance state to low resistance state maintains 100∼1000 and after 1000 cycles of repetitively switching. A 1-nm-thick Al2O3 film in the interface between top electrode and HfOx films, the Pt/Al2O3/HfOx/TiN/Si memory devices were found that soft-error of set and reset process often occurred. Interface states in the anode side play an important role in maintaining a stable resistive switching for HfOx-based memory devices.

HfOx Thin Films for Resistive Memory Device by Use of Atomic Layer Deposition

Amorphous TiOx films and Ag layer were deposited by electron-beam evaporation on soda-lime glass at room temperature. The details regarding the structure, surface morphology, and optical properties of the as-prepared TiOx films were examined by X-ray diffraction, scanning electron microscopy, and ultra-violet (UV) -visible-near-infrared (NIR) spectrometry. The TiOx films exhibit amorphous phase with an optical band gap of 3.35 eV. The polygrains oriented along the (111) and (200) directions in the Ag films were adopted to supply carriers into the TiOx film and lower the sheet resistance of the stacked layer. The multilayer exhibited a sufficiently large Ag thickness (>15 nm), low resistance, high UV transmittance, visible transmittance, and high NIR reflection. Dependence of Ag thickness, TiOx bottom-layer, and TiOx overlayer on the optical and electrical properties of TiOx/Ag/TiOx were explored. A figure of merit (FOM) was used to find an optimal structure for a multilayer with superior conductivity and visible transparency. An FOM of 9.8 × 10−2 (Ω−1) at the visible wavelength of 550 nm for a TiOx/Ag/TiOx stacked layer with an 18-nm-thick Ag and a 20-nm-thick TiOx was achieved. The TiOx/Ag/TiOx sample annealed at 500 °C 10 min also shows a good thermal stability.

Ching-Chiun Wang

Papers

Low-Power Switching of Nonvolatile Resistive Memory Using Hafnium Oxide

Resistive random access memory and method for fabricating the same

Method of manufacturing through-silicon-via and through-silicon-via structure

HfOx Thin Films for Resistive Memory Device by Use of Atomic Layer Deposition

TiOx/Ag/TiOx multilayer for application as a transparent conductive electrode and heat mirror