An overview of the state of art in ferroelectric thin films is presented. First, we review applications: microsystems' applications, applications in high frequency electronics, and memories based on ferroelectric materials. The second section deals with materials, structure (domains, in particular), and size effects. Properties of thin films that are important for applications are then addressed: polarization reversal and properties related to the reliability of ferroelectric memories, piezoelectric nonlinearity of ferroelectric films which is relevant to microsystems' applications, and permittivity and loss in ferroelectric films-important in all applications and essential in high frequency devices. In the context of properties we also discuss nanoscale probing of ferroelectrics. Finally, we comment on two important emerging topics: multiferroic materials and ferroelectric one-dimensional nanostructures. (c) 2006 American Institute of Physics.

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Ferroelectric thin films: Review of materials, properties, and applications

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin (1.4 nm) that its leakage current is too large. It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (κ) or 'high K' gate oxides such as hafnium oxide and hafnium silicate. Little was known about such oxides, and it was soon found that in many respects they have inferior electronic properties to SiO2 ,s uch as a tendency to crystallise and a high concentration of electronic defects. Intensive research is underway to develop these oxides into new high quality electronic materials. This review covers the choice of oxides, their structural and metallurgical behaviour, atomic diffusion, their deposition, interface structure and reactions, their electronic structure, bonding, band offsets, mobility degradation, flat band voltage shifts and electronic defects. The use of high K oxides in capacitors of dynamic random access memories is also covered.

/pdf/high-dielectric-constant-oxides-cotu2e70vd.pdf

High dielectric constant oxides

It is argued that the behavior of dielectric particles as they shrink in size through micrometric to nanometric scales will be increasingly dominated by the properties of their interfaces with the environment. The various interatomic and intermolecular forces that determine the structure of these interfaces are reviewed with special emphasis on their electrical nature. A number of situations in which passive and dynamic dielectric properties are traceable to nanometric interfacial properties are considered. It is also demonstrated that such interfaces are nanometric electromechanical (NEM) systems which acting collectively also explain piezoelectricity in macroscopic systems. Interfaces are naturally nanometric entities and must have a major role in the future development of nanotechnology. Their ubiquitous employment in living systems is noted and comparison suggests synergistic opportunities.

Interfaces are the dominant feature of dielectrics at the nanometric level

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current becomes too large. This led to the replacement of SiO2 by a physically thicker layer of a higher dielectric constant or ‘high-K’ oxide such as hafnium oxide. Intensive research was carried out to develop these oxides into high quality electronic materials. In addition, the incorporation of Ge in the CMOS transistor structure has been employed to enable higher carrier mobility and performance. This review covers both scientific and technological issues related to the high-K gate stack – the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging to achieve the thinnest oxide thicknesses. The high K oxides were implemented in conjunction with a replacement of polycrystalline Si gate electrodes with metal gates. The strong metallurgical interactions between the gate electrodes and the HfO2 which resulted an unstable gate threshold voltage resulted in the use of the lower temperature ‘gate last’ process flow, in addition to the standard ‘gate first’ approach. Work function control by metal gate electrodes and by oxide dipole layers is discussed. The problems associated with high K oxides on Ge channels are also discussed.

/pdf/high-k-materials-and-metal-gates-for-cmos-applications-4hs77i3c4a.pdf

High-K materials and metal gates for CMOS applications

The move to implement metal oxide based gate dielectrics in a metal-oxide-semiconductor field effect transistor is considered one of the most dramatic advances in materials science since the invention of silicon based transistors. Metal oxides are superior to SiO 2 in terms of their higher dielectric constants that enable the required continuous down-scaling of the electrical thickness of the dielectric layer while providing a physically thicker layer to suppress the quantum mechanical tunneling through the dielectric layer. Over the last decade, hafnium based materials have emerged as the designated dielectrics for future generation of nano-electronics with a gate length less than 45 nm, though there exists no consensus on the exact composition of these materials, as evolving device architectures dictate different considerations when optimizing a gate dielectric material. In addition, the implementation of a non-silicon based gate dielectric means a paradigm shift from diffusion based thermal processes to atomic layer deposition processes. In this report, we review how HfO 2 emerges from all likely candidates to become the new gold standard in the microelectronics industry, its different phases, reported electrical properties, and materials processing techniques. Then we use specific examples to discuss the evolution in designing hafnium based materials, from binary to complex oxides and to non-oxide forms as gate dielectric, metal gates and diffusion barriers. To address the impact of these hafnium based materials, their interfaces with silicon as well as a variety of semiconductors are discussed. Finally, the integration issues are highlighted, including carrier scattering, interface state passivation, phonon engineering, and nano-scale patterning, which are essential to realize future generations of devices using hafnium-based high- k materials.

Development of hafnium based high-k materials—A review

The ability of the semiconductor industry to continue scaling microelectronic devices to ever smaller dimensions (a trend known as Moore's Law) is limited by quantum mechanical effects: as the thickness of conventional silicon dioxide (SiO(2)) gate insulators is reduced to just a few atomic layers, electrons can tunnel directly through the films. Continued device scaling will therefore probably require the replacement of the insulator with high-dielectric-constant (high-k) oxides, to increase its thickness, thus preventing tunnelling currents while retaining the electronic properties of an ultrathin SiO(2) film. Ultimately, such insulators will require an atomically defined interface with silicon without an interfacial SiO(2) layer for optimal performance. Following the first reports of epitaxial growth of AO and ABO(3) compounds on silicon, the formation of an atomically abrupt crystalline interface between strontium titanate and silicon was demonstrated. However, the atomic structure proposed for this interface is questionable because it requires silicon atoms that have coordinations rarely found elsewhere in nature. Here we describe first-principles calculations of the formation of the interface between silicon and strontium titanate and its atomic structure. Our study shows that atomic control of the interfacial structure by altering the chemical environment can dramatically improve the electronic properties of the interface to meet technological requirements. The interface structure and its chemistry may provide guidance for the selection process of other high-k gate oxides and for controlling their growth.

https://arxiv.org/pdf/cond-mat/0402173.pdf

The interface between silicon and a high- k oxide

This paper reports state-of-the-art electronic structure calculations on the deposition of strontium on the technologically relevant, (001) orientated silicon surface. We identified the surface reconstructions from $0--\frac{4}{3}$ monolayers and relate them to experimentally reported data. A phase diagram is proposed. We predict phases at $\frac{1}{6},$ $\frac{1}{4},$ $\frac{1}{2},$ $\frac{2}{3},$ and 1 monolayers. Our results are expected to provide valuable information in order to understand heteroepitaxial growth of a prominent class of high-$K$ oxides around ${\mathrm{SrTiO}}_{3}.$ The insight obtained for strontium is expected to be transferable to other alkaline-earth metals.

https://arxiv.org/pdf/cond-mat/0308621.pdf

First-principles calculations of strontium on Si(001)

In the perspective of exploring alternative gate dielectrics for the future generation of microelectronic devices, we investigated experimentally and theoretically the interface energy barriers induced on (001) silicon by La2Hf2O7, whose growth has been recently attained by molecular-beam epitaxy. Experimental results show that the 5.6±0.1eV band gap of La2Hf2O7 is aligned to the band gap of silicon with a valence band offset of 2.4±0.1eV and a conduction band offset of 2.1±0.1eV. Density functional theory calculations yield valence band offset values ranging between 1.8 and 2.4eV.

Band alignment at the La2Hf2O7∕(001)Si interface

This paper reports state-of-the-art electronic structure calculations of La adsorption on the Si(001) surface. We predict La chains in the low-coverage limit, which condense in a stable phase at a coverage of $1∕5$ monolayer. At $1∕3$ monolayer we predict a chemically rather inert, stable phase. La changes its oxidation state from ${\mathrm{La}}^{3+}$ at lower coverages to ${\mathrm{La}}^{2+}$ at coverages beyond $1∕3$ monolayer. In the latter oxidation state, one electron resides in a state with a considerable contribution from La $d$ and $f$ states.

Christopher R. Ashman

Papers

The interface between silicon and a high- k oxide

First-principles calculations of strontium on Si(001)

Band alignment at the La2Hf2O7∕(001)Si interface

Chemistry of La on the Si(001) surface from first principles

Ab-initio simulations on growth and interface properties of epitaxial oxides on silicon