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Showing papers by "Daniel D. Frey published in 2014"


Journal ArticleDOI
TL;DR: In this paper, the designettes, defined as brief, vignette-like design challenges, provide the opportunity to integrate design learning experiences in class, across courses, across terms, and across disciplines.
Abstract: Teaching of engineering design and other fundamental engineering topics is often isolated to dedicated courses, missing an opportunity to foster a culture of engineering design and multidisciplinary problem solving throughout the curriculum. Designettes, defined as brief, vignette-like design challenges, provide the opportunity to integrate design learning experiences in class, across courses, across terms, and across disciplines. When fundamental engineering courses join together in a designette, a multidisciplinary learning activity occurs, demonstrating how subjects are integrated and applied to open-ended problems and grand challenges. The development of designettes helps foster a culture of design, and enables the introduction of multidisciplinary design challenges across all core courses in each semester. These challenges combine problem clarification, concept generation and prototyping with subject content from curricula such as biology, thermodynamics, differential equations, and software with controls. This paper provides examples and investigates the use of single and multidisciplinary designettes over a two-year history of designettes at SUTD. From pre- and post-surveys of junior college students, designettes were found to increase students’ awareness of applications and the learning of content. From 321 third-semester students across six cohorts, designettes were found to increase students’ self-perceptions of their ability to solve multidisciplinary problems.

63 citations


Journal ArticleDOI
TL;DR: It is suggested that some level of presence can be linked with better design, and it implies thatlevel of presence might serve as an indicator of performance and learning in similar design-and-build activities.
Abstract: This paper explores the role of a designer's sense of engagement in early stage design. In the field of virtual reality, presence and immersion are standard measures of an individual's sense of engagement and involvement in an activity. High levels of presence might indicate that the designer is highly focused on the work. The central research question is the following: do designers who are more engaged in design activity, as measured by presence and immersive tendency questionnaires, produce better designs? An experiment was conducted to assess presence and immersive tendencies within the context of a hands-on, open-ended design-and-build activity. The results indicated that the designers' sense of immersion and presence ranged widely as well as their sense of frustration and calmness while performing the design activity. It was found that higher levels of presence correlated with either high design performance or low design performance. Lower levels of presence correlated with average design performance. No correlations were found between immersive tendency and design performance. This study suggests that some level of presence can be linked with better design, and it implies that level of presence might serve as an indicator of performance and learning in similar design-and-build activities.

26 citations


Proceedings ArticleDOI
01 Jun 2014
TL;DR: In this paper, a generic statistical model is proposed to simulate the endurance cycle distribution as a function of the pulse voltage, pulse duration, compliance level, activation energy, dielectric thickness, filament temperature and filament size / shape.
Abstract: Endurance is a key performance metric for non-volatile memory devices. For resistive switching random access memory (RRAM) technology, which operates based on the reversible drift of oxygen ions in a bipolar switching scheme, the degradation in endurance can be stochastically modeled by using the percolation cell framework, as the SET and RESET events are akin to the dielectric breakdown and recovery phenomena in logic gate stacks. Based on our understanding of the physical mechanisms postulated for endurance degradation and the electrical test results on the memory window closure, we propose a generic statistical model in this study that can be used to simulate the endurance cycle distribution as a function of the pulse voltage, pulse duration, compliance level, activation energy, dielectric thickness, filament temperature and filament size / shape. Fitting the endurance model to real test data helps in estimating the value of the activation energy for oxygen ion transport. Our focus here is only on the “failure to RESET” mechanism, whereby the filament does not rupture to reach the high resistance state due to a large imbalance in the oxygen ion and oxygen vacancy count.

8 citations


Journal ArticleDOI
TL;DR: This study analyzed the various factors that affect the forming voltage distribution from a simulation perspective using a Kinetic Monte Carlo (KMC) based formulation of the vacancy defect evolution process in the dielectric to provide guidelines for further reliability design initiatives in tightening the forming distribution.

5 citations


Journal ArticleDOI
TL;DR: A qualitative perspective to prognostic management of a resistive random access memory (RRAM) device is provided and the method of detecting retention loss involves the unique observation of a slope of α = 3/2, which arises due to diffusion or ionic migration phenomenon.

3 citations


Proceedings ArticleDOI
01 Jun 2014
TL;DR: In this paper, a percolation cell framework is used to examine the stochastic of recovery and subsequent breakdown events in pure high-κ dielectrics ignoring the presence of an intrinsic interfacial layer.
Abstract: Dielectric breakdown in high-κ gate stacks has been intensely studied over the past few years from an electrical, physical and statistical perspective. The mechanisms of stress induced leakage current (SILC) and subsequent time dependent dielectric breakdown (TDDB) as well as post-breakdown mechanisms in high-κ dielectrics have been relatively well understood now. Taking cue from the repeatable switching phenomenon in resistive random access memory (RRAM) devices, recent reports show that the percolative damage caused by TDDB and SBD is also partially recoverable. While electrical studies confirming SBD recovery are prevalent, the effect of this recovery on the statistics of the TDDB phenomenon has never been investigated. In particular, it would be useful to have a quantitative model to predict the lifetime enhancement for different degrees of recovery and estimate the role of recovery on the shape, convexity and Weibull slope of the breakdown distributions. Such a model can also be used to estimate the overall lifetime of the device for multiple recovery cycles and the role of gradually lowering efficiency in defect passivation as the device ages. We make use of the standard percolation cell framework here to examine the stochastics of recovery and subsequent breakdown events in pure high-κ dielectrics ignoring the presence of an intrinsic interfacial layer.

2 citations