Emerging trends in wide band gap semiconductors (SiC and GaN) technology for power devices

A sustainable energy future requires power electronics that can enable significantly higher efficiencies in the generation, distribution, and usage of electrical energy. Silicon carbide (4H-SiC) is one of the most technologically advanced wide bandgap semiconductor that can outperform conventional silicon in terms of power handling, maximum operating temperature, and power conversion efficiency in power modules. While SiC Schottky diode is a mature technology, SiC power Metal Oxide Semiconductor Field Effect Transistors are relatively novel and there is large room for performance improvement. Specifically, major initiatives are under way to improve the inversion channel mobility and gate oxide stability in order to further reduce the on-resistance and enhance the gate reliability. Both problems relate to the defects near the SiO2/SiC interface, which have been the focus of intensive studies for more than a decade. Here we review research on the SiC MOS physics and technology, including its brief history, the state-of-art, and the latest progress in this field. We focus on the two main scientific problems, namely, low channel mobility and bias temperature instability. The possible mechanisms behind these issues are discussed at the device physics level as well as the atomic scale, with the support of published physical analysis and theoretical studies results. Some of the most exciting recent progress in interface engineering for improving the channel mobility and fundamental understanding of channel transport is reviewed.

Silicon carbide: A unique platform for metal-oxide-semiconductor physics

The higher voltage blocking capability and faster switching speed of silicon-carbide (SiC) mosfet s have the potential to replace Si insulated gate bipolar transistors (IGBTs) in medium-/low-voltage and high-power applications. In this paper, a state-of-the-art commercially available 325 A, 1700 V SiC mosfet module has been fully characterized under various load currents, bus voltages, and gate resistors to reveal their switching capability. Meanwhile, Si IGBT modules with similar power ratings are also tested under the same conditions. From the test results, several interesting points have been obtained: different to the Si IGBT module, the over-shoot current of the SiC mosfet module increases linearly with the increase of the load current and it has been explained by a model of the over-shoot current proposed in this paper; the induced negative gate voltage due to the complementary device turn- off (crosstalk effect) is more harmful to the SiC mosfet module than the induced positive gate voltage during turn- on when the gate off-voltage is –6 V; the maximum dv / dt and di / dt (electromagnetic interference) during switching transients of the SiC mosfet module are close to those of the Si IGBT module when the gate resistance is larger than 8 Ω but the switching loss of the SiC mosfet module is much smaller; the switching losses of the Si IGBT module are greater than those of the SiC mosfet module even when the gate resistance of the former is reduced to zero. An accurate power loss model, which is suitable for a three-phase two-level converter based on SiC mosfet modules considering the power loss of the parasitic capacitance, has been presented and verified in this paper. From the model, a 96.2% efficiency can be achieved at the switching frequency of 80 kHz and the power of 100 kW.

Performance Evaluation of High-Power SiC MOSFET Modules in Comparison to Si IGBT Modules

Wide bandgap (WBG) device-based power electronics converters are more efficient and lightweight than silicon-based converters. WBG devices are an enabling technology for many motor drive applications and new classes of compact and efficient motors. This paper reviews the potential applications and advances enabled by WBG devices in ac motor drives. Industrial motor drive products using WBG devices are reviewed, and the benefits are highlighted. This paper also discusses the technical challenges, converter design considerations, and design tradeoffs in realizing the full potential of WBG devices in motor drives. There is a tradeoff between high switching frequency and other issues such as high dv/dt and electromagnetic interference. The problems of high common mode currents and bearing and insulation damage, which are caused by high dv/dt , and the reliability of WBG devices are discussed.

Wide Bandgap Devices in AC Electric Drives: Opportunities and Challenges

This silicon-carbide semiconductor device (101) has a silicon-carbide substrate (10), a main electrode (52), a first barrier layer (70a), and a wiring layer (60). The main electrode (52) is provided directly on top of the silicon-carbide substrate (10). The first barrier layer (70a) is provided on top of the main electrode (52) and is made from a conductive material that does not contain aluminum. The wiring layer (60) is provided on top of the first barrier layer (70a), is isolated from the main electrode (52) by the first barrier layer (70a), and is made from a material that does contain aluminum.

Silicon carbide semiconductor device

A vertically oriented field effect device has a body and an enhance gate structure. The body includes a JFET (junction field effect transistor) region disposed between junction implants that extend into the body from a top surface of the body. The gate structure includes a supplemental gate dielectric, a primary gate dielectric, and a gate contact. The supplemental gate dielectric is formed over the top surface of the body above the JFET region, such that the supplemental dielectric is separated from the junction implants by a gap. The primary gate dielectric is formed over the supplemental gate dielectric, above the gap over the top surface of the body, and over at least a portion of the junction implants. The gate contact is formed over the primary gate dielectric.

Field effect device with enhanced gate dielectric structure

In this paper, we report our recently developed 2nd Generation, large-area (56 mm2 with an active conducting area of 40 mm2) 4H-SiC DMOSFET, which can reliably block 1600 V with very low leakage current under a gate-bias (VG) of 0 V at temperatures up to 200°C. The device also exhibits a low on-resistance (RON) of 12.4 mΩ at 150 A and VG of 20 V. DC and dynamic switching characteristics of the SiC DMOSFET have also been compared with a commercially available 1200 V/ 200 A rated Si trench gate IGBT. The switching energy of the SiC DMOSFET at 600 V input voltage bus is > 4X lower than that of the Si IGBT at room-temperature and > 7X lower at 150°C. A comprehensive study on intrinsic reliability of this 2nd generation SiC MOSFET has been performed to build consumer confidence and to achieve broad market adoption of this disruptive power switch technology.

High performance, large-area, 1600 V / 150 A, 4H-SiC DMOSFET for robust high-power and high-temperature applications

The impact of the lifetime enhancement process using high temperature thermal oxidation method on 4H-SiC P-GTOs was investigated. 15 kV 4H-SiC P-GTOs with 140 μm thick drift layers, with and without 1450°C lifetime enhancement oxidation (LEO) process, were compared. The LEO process increased the average carrier lifetime in p-type epi layer from 0.9 μs to 6.25 μs, and it was observed that the effectiveness of the lifetime enhancement process was very sensitive to the doping concentration. The device with the LEO process showed a significant reduction in forward voltage drop and a substantially lower holding current, as expected from the carrier lifetime measurements. However, a slight reduction in blocking capability was also observed from the devices treated with LEO process. The common emitter current gain (β) of the wide base test NPN BJT was approximately 10X higher for the wafer with LEO process.

Impact of carrier lifetime enhancement using high temperature oxidation on 15 kV 4H-SiC P-GTO thyristor

A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift layer. The spreading layer includes a pair of junction implants separated by a junction gate field effect (JFET) region. A gate oxide layer is on top of the spreading layer. The gate contact is on top of the gate oxide layer. Each one of the source contacts are on a portion of the spreading layer separate from the gate oxide layer and the gate contact. The drain contact is on the surface of the substrate opposite the drift layer.

Vertical power transistor device

A Barium-rich interface process provides SIO2/SIC interface conditions suitable for obtaining SiC field-effect (FE) channel mobility twice that of a nitric oxide (NO) passivation anneal. The temperature dependence of the field-effect mobility indicates clear differences in their interface properties. Secondary-ion mass spectrometry (SSIMS) indicates that Ba remains predominantly at the SiO 2 /SiC interface, with only ∼1×1017 cm−3 Ba in the oxide. The interface structure and chemistry of the Ba-modified MOS devices were investigated using scanning transmission electron microscopy (STEM) and energy-dispersive X-ray spectroscopy (EDS). High-angle annular dark-field (HAADF) imaging reveals that the Ba interface layer results in an oxide-interface region not present in the NO annealed control sample. EDS mapping shows that this is a Ba-rich oxide interface layer. Using a new technique “revolving STEM” (RevSTEM) to correct drift and image distortion, SiC strain maps were generated. With an NO anneal there is tensile strain within SiC at the SiO 2 /SiC interface, along the c-axis direction. With the Ba interlayer, however, there is no observable strain relative to the bulk SiC. This interface strain may correlate with the inversion layer mobility, with an unstrained interface preferred.

Daniel J. Lichtenwalner

Papers

Field effect device with enhanced gate dielectric structure

High performance, large-area, 1600 V / 150 A, 4H-SiC DMOSFET for robust high-power and high-temperature applications

Impact of carrier lifetime enhancement using high temperature oxidation on 15 kV 4H-SiC P-GTO thyristor

Vertical power transistor device

Electrical properties and interface structure of SiC MOSFETs with barium interface passivation