D
Domenic Forte
Researcher at University of Florida
Publications - 228
Citations - 5263
Domenic Forte is an academic researcher from University of Florida. The author has contributed to research in topics: Hardware Trojan & Computer science. The author has an hindex of 31, co-authored 210 publications receiving 3652 citations. Previous affiliations of Domenic Forte include University of Connecticut & University of Maryland, College Park.
Papers
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Journal ArticleDOI
Hardware Trojans: Lessons Learned after One Decade of Research
TL;DR: This article examines the research on hardware Trojans from the last decade and attempts to capture the lessons learned and identifies the most critical lessons for those new to the field and suggests a roadmap for future hardware Trojan research.
Journal ArticleDOI
Benchmarking of Hardware Trojans and Maliciously Affected Circuits
TL;DR: This paper presents a comprehensive vulnerability analysis flow at various levels of abstraction of digital-design, that has been utilized to create a suite of Trojans and ‘trust benchmarks’ that can be used by researchers in the community to compare and contrast various Trojan detection techniques.
Journal ArticleDOI
A Survey on Chip to System Reverse Engineering
Shahed Enamul Quadir,Junlin Chen,Domenic Forte,Navid Asadizanjani,Sina Shahbazmohamadi,Lei Wang,John A. Chandy,Mark Tehranipoor +7 more
TL;DR: This survey of RE and anti-RE techniques on the chip, board, and system levels should be of interest to both governmental and industrial bodies whose critical systems and intellectual property (IP) require protection from foreign enemies and counterfeiters who possess advanced RE capabilities.
Book ChapterDOI
Novel Bypass Attack and BDD-based Tradeoff Analysis Against All Known Logic Locking Attacks
TL;DR: A novel “bypass attack” is proposed that ensures the locked circuit works even when an incorrect key is applied and makes it possible for an adversary to be oblivious to the type of SAT-resistant protection applied on the circuit, and still be able to restore the circuit to its correct functionality.
Proceedings ArticleDOI
Bit selection algorithm suitable for high-volume production of SRAM-PUF
TL;DR: The analysis of real SRAM PUFs reveals critical conditions on which to select stable SRAM cells for PUF at low-cost and develops a bit selection procedure that produces very stable bits for the PUF generated ID/key.