Three parallel algorithms for classical molecular dynamics are presented. The first assigns each processor a fixed subset of atoms; the second assigns each a fixed subset of inter-atomic forces to compute; the third assigns each a fixed spatial region. The algorithms are suitable for molecular dynamics models which can be difficult to parallelize efficiently—those with short-range forces where the neighbors of each atom change rapidly. They can be implemented on any distributed-memory parallel machine which allows for message-passing of data between independently executing processors. The algorithms are tested on a standard Lennard-Jones benchmark problem for system sizes ranging from 500 to 100,000,000 atoms on several parallel supercomputers--the nCUBE 2, Intel iPSC/860 and Paragon, and Cray T3D. Comparing the results to the fastest reported vectorized Cray Y-MP and C90 algorithm shows that the current generation of parallel machines is competitive with conventional vector supercomputers even for small problems. For large problems, the spatial algorithm achieves parallel efficiencies of 90% and a 1840-node Intel Paragon performs up to 165 faster than a single Cray C9O processor. Trade-offs between the three algorithms and guidelines for adapting them to more complex molecular dynamics simulations are also discussed.

Fast parallel algorithms for short-range molecular dynamics

Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

/pdf/fundamentals-of-modern-vlsi-devices-471xd7l9pf.pdf

Fundamentals of Modern VLSI Devices

A prevalent and pervasive view of designing is that it can be modeled using variables and decisions made about what values should be taken by these variables. The activity of designing is carried out with the expectation that the designed artifact will operate in the natural world and the social world. These worlds impose constraints on the variables and their values; so, design could be described as a goal-oriented, constrained, decision- making activity. However, design distinguish- es itself from other similarly described activities not only by its domain but also by additional necessary features. Designing involves exploration, exploring what variables might be appropriate. The process of explo- ration involves both goal variables and deci- sion variables. In addition, designing involves learning: Part of the exploration activity is learning about emerging features as a design proceeds. Finally, design activity occurs within two contexts: the context within which the designer operates and the context produced by the developing design itself. The designer’s perception of what the context is affects the implication of the context on the design. The context shifts as the designer’s perceptions change. Design activity can be now characterized as a goal-oriented, con- strained, decision-making, exploration, and learning activity that operates within a con- text that depends on the designer’s percep- tion of the context.

Design Prototypes: A Knowledge Representation Schema for Design

Creativity: Flow and the Psychology of Discovery and Invention

Cognitive engineering

Very thin erbium silicide layers have been used as source and drain contacts to n-type Si in low Schottky barrier MOSFETs on silicon-on-insulator substrates Erbium silicide is formed by a solid-state reaction between the metal and silicon during annealing The influence of annealing temperature (450 degrees C, 525 degrees C and 600 degrees C) on the formation of an erbium silicide layer in the Pt/Er/Si/SiO2/Si structure was analysed by means of cross-sectional transmission electron microscopy The Si grains/interlayer formed at the interface and the presence of Si grains within the Er-related layer constitute proof that Si reacts with Er in the presence of a Pt top layer in the temperature range 450-600 degrees C The process of silicide formation in the Pt/Er/Si structure differs from that in the Er/Si structure At 600 degrees C, the Pt top layer vanishes and a (Pt-Er)Si-x system is formed

Transmission electron microscopy characterization of the erbium silicide formation process using a Pt/Er stack on a silicon-on-insulator substrate

The stacking of crystal semiconductor thin films alternated with dielectric layers continuously arouses a sustained interest for its utility in three-dimensional (3D) integration of metal-oxide-semiconductor field-effect transistor (MOSFET). However, the growth of crystalline silicon without resorting to epitaxial growth from a crystal seed still constitutes an unresolved challenge. Although many different techniques ranging from solid-phase crystallization to thin-film bonding constitutes possible solutions with their respective advantages and weaknesses, little attention has been paid so far to the adaptation of a technique widely used for producing semiconductor nanowires, namely, the vapor–liquid–solid (VLS) catalytic growth. The basic idea developed in this chapter is to control VLS growth for synthesizing local silicon-on-insulator (SOI) layers at reduced thermal budget. Confined VLS growth is therefore proposed to produce single crystalline silicon (c-Si) film over an amorphous oxide layer, without crystalline seeding. It is demonstrated that VLS growth in the spatial confinement of a cavity produces nanometer-thick c-Si ribbons over a micron area scale with a well controlled localization. The nature of grown silicon layers is characterized by SEM (Scanning Electron Microscopy), EBSD (Electron Backscattered Diffraction) and STEM (Scanning Transmission Electron Microscopy) to analyze its crystallinity and to check the impact of the confining cavity walls on the purity of grown silicon. Beyond the in-depth structural analysis of VLS grown nanoribbons, simple back-gated MOSFET structures have been fabricated and electrically characterized to extract transport properties. The obtained hole mobility of 53 cm2 s−1 V−1 constitutes an excellent compromise for a processing temperature less or equal to 500°C.

Confined and Guided Vapor–Liquid–Solid Catalytic Growth of Silicon Nanoribbons: From Nanowires to Structured Silicon-on-Insulator Layers

A chemical receptor specific to traces of organophosphorus nerve agents (OPs) has been synthesized and grafted to carbon nanotubes and silicon nanowires in order to make electrical sensors. Our results show that it is possible to detect efficiently sub-ppm traces of OPs with excellent selectivity notably with the use of silicon nanowires by monitoring the Drain-Source current of the SiNW-FET at an optimum back Gate voltage as a function of time. First developments of a prototype have also been realized.

https://iopscience.iop.org/article/10.1088/1742-6596/307/1/012008/pdf

New Chemically Functionalized Nanomaterials for Electrical Nerve Agents Sensors

/pdf/self-aligned-single-electron-memories-535mgpgc9k.pdf

Self-aligned single-electron memories

In this position paper, we focus on human cockpit interac-tion using a human centered approach, that is to say theidentification of important information that might be pro-vided to drivers referring to the different levels of situation-awareness. We tackle the following question: "How to op-erate a dynamic delegation to the machine in the case ofautonomous vehicles?"

Emmanuel Dubois

Papers

Transmission electron microscopy characterization of the erbium silicide formation process using a Pt/Er stack on a silicon-on-insulator substrate

Confined and Guided Vapor–Liquid–Solid Catalytic Growth of Silicon Nanoribbons: From Nanowires to Structured Silicon-on-Insulator Layers

New Chemically Functionalized Nanomaterials for Electrical Nerve Agents Sensors

Self-aligned single-electron memories

Adaptive Human Machine Interfaces in an Autonomous Vehicle