The density-matrix renormalization group (DMRG) is a numerical algorithm for the efficient truncation of the Hilbert space of low-dimensional strongly correlated quantum systems based on a rather general decimation prescription. This algorithm has achieved unprecedented precision in the description of one-dimensional quantum systems. It has therefore quickly become the method of choice for numerical studies of such systems. Its applications to the calculation of static, dynamic, and thermodynamic quantities in these systems are reviewed here. The potential of DMRG applications in the fields of two-dimensional quantum systems, quantum chemistry, three-dimensional small grains, nuclear physics, equilibrium and nonequilibrium statistical physics, and time-dependent phenomena is also discussed. This review additionally considers the theoretical foundations of the method, examining its relationship to matrix-product states and the quantum information content of the density matrices generated by the DMRG.

http://www.physics.udel.edu/~bnikolic/QTTG/NOTES/DMRG/SCHOLLWOCK=RMP_dmrg.pdf

The density-matrix renormalization group

Field-effect transistors (FETs) based on semi-conductor nanowires could one day replace standard silicon MOSFETs in miniature electronic circuits. MOSFETs, or metal-oxide semiconductor field-effect transistors, are a type of transistor used for high-speed switching and in a computer's integrated circuits. A specially designed nanowire with a germanium shell and silicon core has shown promise as a nanometre-scale field-effect transistor: it has a near-perfect channel for electronic conduction. Now, in transistor configuration, this germanium/silicon nanowire is shown to have properties including high conductance and short switching time delay that are better than state-of-the-art silicon MOSFETs. In a transistor configuration, a new germanium/silicon nanowire has characteristics such as conductance, on-current and switching time delay that are better than those of state-of-the-art silicon metal-oxide-semiconductor field-effect transitors. Semiconducting carbon nanotubes1,2 and nanowires3 are potential alternatives to planar metal-oxide-semiconductor field-effect transistors (MOSFETs)4 owing, for example, to their unique electronic structure and reduced carrier scattering caused by one-dimensional quantum confinement effects1,5. Studies have demonstrated long carrier mean free paths at room temperature in both carbon nanotubes1,6 and Ge/Si core/shell nanowires7. In the case of carbon nanotube FETs, devices have been fabricated that work close to the ballistic limit8. Applications of high-performance carbon nanotube FETs have been hindered, however, by difficulties in producing uniform semiconducting nanotubes, a factor not limiting nanowires, which have been prepared with reproducible electronic properties in high yield as required for large-scale integrated systems3,9,10. Yet whether nanowire field-effect transistors (NWFETs) can indeed outperform their planar counterparts is still unclear4. Here we report studies on Ge/Si core/shell nanowire heterostructures configured as FETs using high-κ dielectrics in a top-gate geometry. The clean one-dimensional hole-gas in the Ge/Si nanowire heterostructures7 and enhanced gate coupling with high-κ dielectrics give high-performance FETs values of the scaled transconductance (3.3 mS µm-1) and on-current (2.1 mA µm-1) that are three to four times greater than state-of-the-art MOSFETs and are the highest obtained on NWFETs. Furthermore, comparison of the intrinsic switching delay, τ = CV/I, which represents a key metric for device applications4,11, shows that the performance of Ge/Si NWFETs is comparable to similar length carbon nanotube FETs and substantially exceeds the length-dependent scaling of planar silicon MOSFETs.

Ge/Si nanowire heterostructures as high-performance field-effect transistors

Creating functional electrical circuits using individual or ensemble molecules, often termed as “molecular-scale electronics”, not only meets the increasing technical demands of the miniaturization of traditional Si-based electronic devices, but also provides an ideal window of exploring the intrinsic properties of materials at the molecular level. This Review covers the major advances with the most general applicability and emphasizes new insights into the development of efficient platform methodologies for building reliable molecular electronic devices with desired functionalities through the combination of programmed bottom-up self-assembly and sophisticated top-down device fabrication. First, we summarize a number of different approaches of forming molecular-scale junctions and discuss various experimental techniques for examining these nanoscale circuits in details. We then give a full introduction of characterization techniques and theoretical simulations for molecular electronics. Third, we highlig...

Molecular-Scale Electronics: From Concept to Function

The formation of the Schottky barrier height (SBH) is a complex problem because of the dependence of the SBH on the atomic structure of the metal-semiconductor (MS) interface. Existing models of the SBH are too simple to realistically treat the chemistry exhibited at MS interfaces. This article points out, through examination of available experimental and theoretical results, that a comprehensive, quantum-mechanics-based picture of SBH formation can already be constructed, although no simple equations can emerge, which are applicable for all MS interfaces. Important concepts and principles in physics and chemistry that govern the formation of the SBH are described in detail, from which the experimental and theoretical results for individual MS interfaces can be understood. Strategies used and results obtained from recent investigations to systematically modify the SBH are also examined from the perspective of the physical and chemical principles of the MS interface.

The physics and chemistry of the Schottky barrier height

A common misconception is that the irradiation of solids with energetic electrons and ions has exclusively detrimental effects on the properties of target materials. In addition to the well-known cases of doping of bulk semiconductors and ion beam nitriding of steels, recent experiments show that irradiation can also have beneficial effects on nanostructured systems. Electron or ion beams may serve as tools to synthesize nanoclusters and nanowires, change their morphology in a controllable manner, and tailor their mechanical, electronic, and even magnetic properties. Harnessing irradiation as a tool for modifying material properties at the nanoscale requires having the full microscopic picture of defect production and annealing in nanotargets. In this article, we review recent progress in the understanding of effects of irradiation on various zero-dimensional and one-dimensional nanoscale systems, such as semiconductor and metal nanoclusters and nanowires, nanotubes, and fullerenes. We also consider the t...

Ion and electron irradiation-induced effects in nanostructured materials

A fast and stable numerical algorithm for solving the symmetric eigenvalue problem is presented. The technique deviates fundamentally from the traditional Krylov subspace iteration based techniques (Arnoldi and Lanczos algorithms) or other Davidson-Jacobi techniques and takes its inspiration from the contour integration and density-matrix representation in quantum mechanics. It will be shown that this algorithm---named FEAST---exhibits high efficiency, robustness, accuracy, and scalability on parallel architectures. Examples from electronic structure calculations of carbon nanotubes are presented, and numerical performances and capabilities are discussed.

Density-Matrix-Based Algorithm for Solving Eigenvalue Problems

The silicon nanowire transistor (SNWT) is a promising device structure for future integrated circuits, and simulations will be important for understanding its device physics and assessing its ultimate performance limits. In this work, we present a three-dimensional (3D) quantum mechanical simulation approach to treat various SNWTs within the effective-mass approximation. We begin by assuming ballistic transport, which gives the upper performance limit of the devices. The use of a mode space approach (either coupled or uncoupled) produces high computational efficiency that makes our 3D quantum simulator practical for extensive device simulation and design. Scattering in SNWTs is then treated by a simple model that uses so-called Buttiker probes, which was previously used in metal-oxide-semiconductor field effect transistor simulations. Using this simple approach, the effects of scattering on both internal device characteristics and terminal currents can be examined, which enables our simulator to be used f...

/pdf/a-three-dimensional-quantum-simulation-of-silicon-nanowire-4ovhsdezo3.pdf

A three-dimensional quantum simulation of silicon nanowire transistors with the effective-mass approximation

The silicon nanowire transistor (SNWT) is a promising device structure for future integrated circuits, and simulations will be important for understanding its device physics and assessing its ultimate performance limits. In this work, we present a three-dimensional quantum mechanical simulation approach to treat various SNWTs within the effective-mass approximation. We begin by assuming ballistic transport, which gives the upper performance limit of the devices. The use of a mode space approach (either coupled or uncoupled) produces high computational efficiency that makes our 3D quantum simulator practical for extensive device simulation and design. Scattering in SNWTs is then treated by a simple model that uses so-called Buttiker probes, which was previously used in metal-oxide-semiconductor field effect transistor (MOSFET) simulations. Using this simple approach, the effects of scattering on both internal device characteristics and terminal currents can be examined, which enables our simulator to be used for the exploration of realistic performance limits of SNWTs.

/pdf/a-three-dimensional-quantum-simulation-of-silicon-nanowire-40cj85fsc2.pdf

A Three-Dimensional Quantum Simulation of Silicon Nanowire Transistors with the Effective-Mass Approximation

This paper describes an efficient and robust hybrid parallel solver ''the SPIKE algorithm'' for narrow-banded linear systems. Two versions of SPIKE with their built-in-options are described in detail: the Recursive SPIKE version for handling non-diagonally dominant systems and the Truncated SPIKE version for diagonally dominant ones. These SPIKE schemes can be used either as direct solvers, or as preconditioners for outer iterative schemes. Both versions are faster than the direct solvers in ScaLAPACK on parallel computing platforms, and quite competitive in terms of achieved accuracy for handling systems that are dense within the band.

A parallel hybrid banded system solver: the SPIKE algorithm

Using a full three-dimensional (3D), quantum transport simulator, we theoretically investigate the effects of surface roughness scattering (SRS) on the device characteristics of Si nanowire transistors (SNWTs). The microscopic structure of the Si/SiO2 interface roughness is directly treated by using a 3D finite element technique. The results show that (1) SRS reduces the electron density of states in the channel, which increases the SNWT threshold voltage, and (2) the SRS in SNWTs becomes less effective when fewer propagating modes are occupied, which implies that SRS is less important in small-diameter SNWTs with few modes conducting than in planar metal-oxide-semiconductor field-effect-transistors with many transverse modes occupied.

/pdf/theoretical-investigation-of-surface-roughness-scattering-in-2x6l2jtkbz.pdf

Eric Polizzi

Papers

Density-Matrix-Based Algorithm for Solving Eigenvalue Problems

A three-dimensional quantum simulation of silicon nanowire transistors with the effective-mass approximation

A Three-Dimensional Quantum Simulation of Silicon Nanowire Transistors with the Effective-Mass Approximation

A parallel hybrid banded system solver: the SPIKE algorithm

Theoretical investigation of surface roughness scattering in silicon nanowire transistors