This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

© 2020 Tech Science Press. All rights reserved. With the development of the times, people's requirements for communication technology are becoming higher and higher. 4G communication technology has been unable to meet development needs, and 5G communication technology has emerged as the times require. This article proposes the design of a low-noise amplifier (LNA) that will be used in the 5G band of China Mobile Communications. A low noise amplifier for mobile 5G communication is designed based on Taiwan Semiconductor Manufacturing Company (TSMC) 0.13 μm Radio Frequency (RF) Complementary Metal Oxide Semiconductor (CMOS) process. The LNA employs self-cascode devices in current-reuse configuration to enable lower supply voltage operation without compromising the gain. This design uses an active feedback amplifier to achieve input impedance matching, avoiding the introduction of resistive negative feedback to reduce gain. A common source (CS) amplifier is used as the input of the low noise amplifier. In order to achieve the low power consumption of LNA, current reuse technology is used to reduce power consumption. Noise cancellation techniques are used to eliminate noise. The simulation results in a maximum power gain of 22.783, the reverse isolation (S12) less than -48.092 dB, noise figure (NF) less than 1.878 dB, minimum noise figure (NFmin)=1.203 dB, input return loss (S11) and output return loss (S22) are both less than -14.933 dB in the frequency range of 2515-4900 MHz. The proposed Ultra-wideband (UWB) LNA consumed 1.424 mW without buffer from a 1.2 V power supply. Disciplines Engineering | Science and Technology Studies Publication Details Zhao, X., Cheng, W., Zhu, H., Ge, C., Zhou, G. & Fu, Z. (2020). A high gain, noise cancelling 2515-4900 MHz CMOS LNA for China mobile 5G communication application. Computers, Materials and Continua, 64 (2), 1139-1151. Authors Xiaorong Zhao, Weili Cheng, Hongjin Zhu, Chunpeng Ge, Gengyuan Zhou, and Zhongjun Fu Computers, Materials & Continua CMC, vol.64, no.2, pp.1139-1151, 2020 CMC. doi:10.32604/cmc.2020.010220 www.techscience.com/journal/cmc A High Gain, Noise Cancelling 2515-4900 MHz CMOS LNA for China Mobile 5G Communication Application Xiaorong Zhao1, Weili Cheng2, Hongjin Zhu1, Chunpeng Ge3, Gengyuan Zhou1, * and Zhongjun Fu1 Abstract: With the development of the times, people’s requirements for communication technology are becoming higher and higher. 4G communication technology has been unable to meet development needs, and 5G communication technology has emerged as the times require. This article proposes the design of a low-noise amplifier (LNA) that will be used in the 5G band of China Mobile Communications. A low noise amplifier for mobile 5G communication is designed based on Taiwan Semiconductor Manufacturing Company (TSMC) 0.13 μm Radio Frequency (RF) Complementary Metal Oxide Semiconductor (CMOS) process. The LNA employs self-cascode devices in currentreuse configuration to enable lower supply voltage operation without compromising the gain. This design uses an active feedback amplifier to achieve input impedance matching, avoiding the introduction of resistive negative feedback to reduce gain. A common source (CS) amplifier is used as the input of the low noise amplifier. In order to achieve the low power consumption of LNA, current reuse technology is used to reduce power consumption. Noise cancellation techniques are used to eliminate noise. The simulation results in a maximum power gain of 22.783, the reverse isolation (S12) less than -48.092 dB, noise figure (NF) less than 1.878 dB, minimum noise figure (NFmin)=1.203 dB, input return loss (S11) and output return loss (S22) are both less than -14.933 dB in the frequency range of 2515-4900 MHz. The proposed Ultra-wideband (UWB) LNA consumed 1.424 mW without buffer from a 1.2 V power supply. With the development of the times, people’s requirements for communication technology are becoming higher and higher. 4G communication technology has been unable to meet development needs, and 5G communication technology has emerged as the times require. This article proposes the design of a low-noise amplifier (LNA) that will be used in the 5G band of China Mobile Communications. A low noise amplifier for mobile 5G communication is designed based on Taiwan Semiconductor Manufacturing Company (TSMC) 0.13 μm Radio Frequency (RF) Complementary Metal Oxide Semiconductor (CMOS) process. The LNA employs self-cascode devices in currentreuse configuration to enable lower supply voltage operation without compromising the gain. This design uses an active feedback amplifier to achieve input impedance matching, avoiding the introduction of resistive negative feedback to reduce gain. A common source (CS) amplifier is used as the input of the low noise amplifier. In order to achieve the low power consumption of LNA, current reuse technology is used to reduce power consumption. Noise cancellation techniques are used to eliminate noise. The simulation results in a maximum power gain of 22.783, the reverse isolation (S12) less than -48.092 dB, noise figure (NF) less than 1.878 dB, minimum noise figure (NFmin)=1.203 dB, input return loss (S11) and output return loss (S22) are both less than -14.933 dB in the frequency range of 2515-4900 MHz. The proposed Ultra-wideband (UWB) LNA consumed 1.424 mW without buffer from a 1.2 V power supply.

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A high gain, noise cancelling 2515-4900 MHz CMOS LNA for China mobile 5G communication application

This paper presents an optimum design of an ultra-wideband (UWB) 2.5–10.5-GHz low-noise amplifier (LNA) in 180-nm and 65-nm radiofrequency (RF)-complementary metal–oxide–semiconductor (CMOS) technology. A novel input matching network employing resistive–inductive feedback and a noise-canceling technique is proposed to achieve broadband matching as well as a low noise figure (NF). Moreover, a current-reused structure and the inductive peaking technique are applied in the proposed LNA to reduce its power consumption and provide high, flat gain. The proposed UWB-LNA is optimized using heuristic multiobjective optimization based on inclined planes system optimization (IPO) and particle swarm optimization (PSO) as simulation-based evolutionary techniques. The proposed UWB-LNA is designed and simulated using HSPICE and Cadence Spectre RF. The postlayout simulation results show an input return loss (S11) of less than −10 dB, a flat power gain (S21) of 13.2 ± 0.5 and 14 ± 0.5 dB, and an NF below 5 and 2.5 dB over the whole UWB band when implemented in 180-nm and 65-nm CMOS technology, respectively. The UWB-LNA consumes 7.2 and 9.5 mW from a 1.8-V power supply when implemented in 180-nm and 65-nm CMOS technology, respectively.

Optimum design of a new ultra-wideband LNA using heuristic multiobjective optimization

Highly robust X-band quasi circulator-integrated low-noise amplifier for high survivability of radio frequency front-end systems

A common-gate cascaded with cascoded self-bias common source approach for 3.1–10.6 GHz UWB low noise amplifier

In this paper, a low power ultra-wideband (UWB) low noise amplifier (LNA) with high and flat voltage gain is proposed using CS-CG noise-cancellation and dual resonance network techniques based on TSMC 180 nm technology. The CS-CG noise cancellation technique reduced the noise figure in 3-10.6 GHz frequency band, and the dual resonance network technique is applied to reach an acceptable input matching. In order to reduce the number of inductors, the active inductor is used in the noise cancellation stage. Also, to control voltage gain and input return loss, a resistor is connected in parallel to channel length modulation resistance of the transistor in the first stage. The developed LNA circuit provides a high and flat voltage gain of 12.75 dB with 0.65 dB variation, which is the result of using two stages common-source topology. An average noise figure of 2 dB, with its maximum value of 2.3 dB, an IIP3 of -8 dBm are obtained from 3 to 10.6 GHz, respectively. The obtained input and output matching value are better than -10 dB. The layout of proposed LNA occupies an area of 0.55 mm2 including ring pad and this structure consumes 11.56 mW from 1-V dc supply.

https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/iet-cds.2019.0078

Ultra-wideband complementary metal-oxide semiconductor low noise amplifier using CS-CG noise-cancellation and dual resonance network techniques

Gain-controlled noise-reduction LNA design using source-bulk resistors and double common-source topology

In this paper, a low-power ultra-wideband low noise amplifier (LNA) is presented. The combination of dual resonance network and current-bleeding technique offers high and flat voltage gain and low noise figure (NF), and also, the gain-controller resistor technique causes better control of voltage gain to achieve flatter gain. Furthermore, the CS–CD (Common-Source Common-Drain) current-reuse technique provides output return loss reduction and eliminates buffer stage in LNA design. It has been shown that using this scheme, noticeable improvement has been obtained in the frequency range of 2–11 GHz. This improvement consists of minimum noise figure value as 2.5 dB, the maximum value of 4.2 dB and average noise figure lower than 3 dB in a wide frequency range, from 4 to 10 GHz. The proposed LNA achieves the average voltage gain of 12.35 dB with a variation of 0.85 dB in the frequency range of 2–11 GHz. Input and output return losses are below − 10 dB and IIP3 of the proposed structure is − 3 dBm. The proposed LNA consumes 9.52 mW in 1-V supply voltage. Moreover, the size of the structure is 0.54 mm2 in TSMC 180-nm technology.

Farzad Daryabari

Papers

Ultra-wideband complementary metal-oxide semiconductor low noise amplifier using CS-CG noise-cancellation and dual resonance network techniques

Gain-controlled noise-reduction LNA design using source-bulk resistors and double common-source topology

Low-power ultra-wideband LNA employing CS–CD current-reuse and gain-controller resistor technique in 0.180-μm CMOS technology