Showing papers by "Franz Kreupl published in 2004"

High-current nanotube transistors

Abstract: Planar field effect transistors (FET) consisting of a large number of parallel single-walled carbon nanotubes (SWCNT) have been fabricated that allow very high on-currents of the order of several milliamperes and on/off ratios exceeding 500. With these devices it is demonstrated, for the first time, that SWCNTs can be used as transistors to control macroscopic devices, e.g., light emitting diodes and electromotors. Those transistors were fabricated by a very simple process that is based on the catalytic chemical vapor deposition (CCVD) growth of SWCNTs at low temperatures, a single lithographic step to define the source and drain contacts, and a bias pulse to eliminate the metallic SWCNTs.

Chemical Vapor Deposition Growth of Single-Walled Carbon Nanotubes at 600 °C and a Simple Growth Model

Abstract: A comparison of different catalysts (Ni, Co, Fe/Mo) has been performed in order to minimize the growth temperature for single-walled carbon nanotubes (SWCNTs). Dense SWCNT networks have been synthesized by thermal chemical vapor deposition (CVD) at temperatures as low as 600 °C using Ni catalyst layers of approximately 0.2 nm thickness. The dependence of the SWCNT growth on the most important parameters will be discussed exemplarily on the Ni catalyst system. On the basis of experimental observations, a phenomenological growth model for CVD synthesis of SWCNTs is proposed which is based on the interactions between the catalyst and its support. Further, it is suggested that only surface diffusion of hydrocarbons on the catalyst support or along the CNTs can explain the fast growth rates of SWCNTs during CVD synthesis.

Carbon nanotube applications in microelectronics

Abstract: The extraordinary characteristics of carbon nanotubes make them a promising candidate for applications in microelectronics. Catalyst-mediated chemical vapor deposition growth is very well suited for selective in-situ growth of nanotubes compatible with the requirements of microelectronics technology. This deposition method can be exploited for carbon nanotube vias. Semiconducting single-walled tubes can be successfully operated as carbon nanotube field effect transistors (CNTFET). A simulation of an ideal CNTFET is presented and compared with the requirements of the ITRS roadmap. Finally, we compare an upgraded CNTFET with the most advanced silicon metal oxide semiconductor field effect transistors and discuss integration issues.

Sub 20 nm Short Channel Carbon Nanotube Transistors

Abstract: Carbon nanotube field-effect transistors with sub 20 nm long channels and on/off current ratios of > 1000000 are demonstrated. Individual single-walled carbon nanotubes with diameters ranging from 0.7 nm to 1.1 nm grown from structured catalytic islands using chemical vapor deposition at 700 degree Celsius form the channels. Electron beam lithography and a combination of HSQ, calix[6]arene and PMMA e-beam resists were used to structure the short channels and source and drain regions. The nanotube transistors display on-currents in excess of 15 microA for drain-source biases of only 0.4 Volt.

Carbon Nanotubes for Interconnect Applications

Abstract: We briefly review the status of the application of carbon nanotubes (CNTs) for future interconnects and present results concerning possible integration schemes. Growth of single nanotubes at lithographically defined locations (vias) has been achieved which is a prerequisite for the use of CNTs as future interconnects. For the 20 nm node, a current density of 5 10^8 A/cm^2 and a resistance of 7.8 kOhm could be achieved for a single multi-walled CNT vertical interconnect.

Bias dependence and electrical breakdown of small diameter single-walled carbon nanotubes

Abstract: The electronic breakdown and the bias dependence of the conductance have been investigated for a large number of catalytic chemical vapor deposition grown single-walled carbon nanotubes (SWCNTs) with very small diameters. The convenient fabrication of thousands of properly contacted SWCNTs was possible by growth on electrode structures and subsequent electroless palladium deposition. Almost all of the measured SWCNTs showed at least weak gate dependence at room temperature. Large differences in the conductance and breakdown behavior have been found for “normal” semiconducting SWCNTs and small band-gap semiconducting SWCNTs.

IC chip with nanowires

Abstract: Arrangement of nanowires with PN junctions between bit lines and word lines are arranged as a ROM memory cell array. A number of the nanowires have dielectric regions and are present only as a dummy. The connections between word and bit lines may also exist as transistors which turn on or turn off only when a gate voltage is applied. A number of these transistors are constructed in complementary fashion and/or have insulating regions built in and serve as a dummy.

Method for fabricating memory cells and memory cell array

Abstract: A method for producing memory cells, in which an electrically conductive substrate is provided, a trench structure or cup structure with side walls and a base is formed in or on the substrate, a first insulation layer is deposited at the side walls, a capacitor material is deposited on the base, a nanostructure is grown starting from and electrically connected to the catalyst material deposited on the base, a second insulation layer is deposited on the nanostructure and on the base, and finally an electrically conductive layer is deposited as a counterelectrode on the first insulation layer and second insulation layer.

Contact-connection of nanotubes

Abstract: Process for contact-connection of carbon nanotubes as part of their integration in an electric circuit, wherein the nanotubes, after they have been applied to metallic interconnects of the electric circuit, are connected to the interconnects at contact locations by electroless metallization.

Method for depositing a conductive carbon material on a semiconductor for forming a schottky contact and semiconductor contact device

Abstract: The invention relates to a method for depositing a conductive carbon material (17) on a semiconductor (14) for forming a Schottky contact (16). The inventive method comprises the following steps: introducing a semiconductor (14) into a process chamber (10); heating the interior (10') of a process chamber (10) to a defined temperature; evacuating the process chamber (10) to a first defined pressure or below; heating the interior (10') of a process chamber (10) to a second defined temperature; introducing a gas (12) which comprises at least carbon, until a second defined pressure is achieved which is higher than the first defined pressure; and depositing the conductive carbon material (17) on the semiconductor (14) from the gas (12) which comprises at least carbon, whereby the deposited carbon material (17) forms the Schottky contact (16) on the semiconductor (14).

Microelectronic interconnects based on carbon nanotubes

Abstract: Carbon nanotubes have emerged as a possible new material for electronic applications. They show promising characteristics for transistors as well as for interconnects. Here we review their basic properties and focus on the status of nanotubes with respect to their application as interconnects and discuss the challenges facing their integration.

Verfahren zur abscheidung eines leitfähigen kohlenstoffmaterials auf einem halbleiter zur ausbildung eines schottky-kontaktes und halbleiterkontaktvorrichtung

Abstract: Die vorliegende Erfindung stellt ein Verfahren zur Abscheidung eines leitfahigen Kohlenstoffmaterials (17) auf einem Halbleiter (14) zur Ausbildung eines Schottky-Kontaktes (16) mit den Schritten bereit: Einbringen des Halbleiters (14) in die Prozesskammer (10); Erhitzen des Innenraums (10') einer Prozesskammer (10) auf eine vorbestimmte Temperatur; Evakuieren der Prozesskammer (10) auf einen ersten vorbestimmten Druck oder darunter; Erhitzen des Innenraums (10') einer Prozesskammer (10) auf eine zweite vorbestimmte Temperatur; Einleiten eines Gases (12), welches zumindest Kohlenstoff aufweist, bis ein zweiter vorbestimmter Druck erreicht ist, welcher hoher als der erste vorbestimmte Druck ist; und Abscheiden des leitfahigen Kohlenstoffmaterials (17) auf dem Halbleiters (14) aus dem Gas (12), welches zumindest Kohlenstoff aufweist, wobei das abgeschiedene Kohlenstoffmaterial (17) auf dem Halbleiter (14) den Schottky-Kontakt (16) ausbildet.

Electrical Interconnects Made of Carbon Nanotubes

Abstract: The unique properties of carbon nanotubes (CNTs) make them promising candidates for electrical conductors in microelectronic devices. The parallel integration of CNTs into processes that are compatible with the requirements of the microelectronic industry will be important for their future application in chip devices. We present lithography‐based processes to create vertical electrical interconnects made of CNTs. The approach involves catalyst and dielectric (insulator) deposition, lithography, standard etch processes, CVD growth of the CNTs, and the structured deposition of metallic top contacts. This paper will discuss the electrical properties of these CNT vertical interconnects and compare them with the requirements of the ITRS roadmap.

Microelectronic semiconductor component has at least one electrode comprising a carbon containing layer

Abstract: A microelectronic semiconductor element comprises at least one electrode comprising a carbon-containing layer. Preferably the element is a FET having a gate electrode and a source/drain electrode comprising the carbon-containing layer. An independent claim is also included for a production process for the above.

Bridge field-effect transistor storage cell, device comprising said cells and method for producing a bridge field-effect transistor storage cell

Abstract: The invention relates to a bridge field-effect transistor storage cell comprising a first and second source/ drain areas and a channel area arranged therebetween which are formed in a semiconductor bridge. The inventive storage cell also comprises a charge-coupled layer which is disposed at least partially on the semiconductor bridge and a metal conductive gate area on at least one part of said charge-coupled layer which is arranged in such a way that electric charge carriers are selectively introducible or removable by applying a predetermined electric voltage to the bridge field-effect transistor storage cell.

Elektrischer Schaltkreis mit einer Kohlenstoff-Leiterstruktur und Verfahren zum Herstellen einer Kohlenstoff-Leiterstruktur eines elektrischen Schaltkreises

Abstract: Ein elektrischer Schaltkreis weist zumindest eine Kohlenstoff-Leiterstruktur auf, welche mittels einer im wesentlichen aus Kohlenstoff bestehenden Schicht ausgebildet ist, welche einen spezifischen Widerstand von weniger als 1 mΩcm aufweist

Integrated electronic component having specifically produced nanotubes in vertical structures

Abstract: The invention relates to an integrated electronic component, comprising a substrate (1), at least one metal multilayer system, which is placed on the substrate at least in areas, and comprising a nonconducting layer (50), which is placed on the metal multilayer system and which has at least one contact hole, inside of which at least one nanotube is grown at the bottom of the contact hole on the metal multilayer system. The metal multilayer system is constructed from a metal layer (20) with a high melting point, a metal separation layer (30), and from a catalyst layer (40). The invention also relates to a method for specifically producing nanotubes in vertical structures, and to the use of a metal multilayer system for specifically producing nanotubes in vertical structures.

Carbon Nanotubes in Microelectronic Applications

Abstract: Carbon nanotubes with their outstanding electrical and mechanical properties are suggested as interconnect material of the future and as switching devices, which could outperform silicon devices. In this paper we will introduce nanotubes, specify the applications, where nanotubes can contribute to the advancement of Moore's law and show our progress of nanotube process integration in a microelectronic compatible way. The growth of single individual nanotubes at lithographically defined locations on whole wafers as a key requirement for the successful implementation of nanotubes is shown. In terms of nanotube transistors we propose a vertical nanotube transistor concept which outperforms the ITRS requirements for the year 2016. The performance is mainly limited by contact resistances, but by comparison with silicon devices we show that fabricated nanotube transistors already today exceed the values for transconductance, on-resistance and drive current of silicon devices.

Elektrischer schaltkreis mit einer nanostruktur und verfahren zum herstellen einer kontaktierung einer nanostruktur

Abstract: Ein elektrischer Schaltkreis weist zumindest eine Nanostruktur und eine Kohlenstoff-Leiterbahn auf, welche Kohlenstoff-Leiterbahn mittels einer im wesentlichen aus Kohlenstoff bestehenden Schicht ausgebildet ist, wobei die Nanostruktur und die Kohlenstoff-Leiterbahn im direkten Kontakt stehen.

Carbon Nanotubes: Can they become a microelectronics technology?

Abstract: Carbon nanotubes (CNTs) have a large variety of properties that make them attractive for applications in microelectronics. A comparison of carbon nanotube field‐effect transistors with silicon MOSFETs shows that CNT devices outperform state‐of‐the‐art silicon transistors. A silicon technology review gives the benchmark for an assessment of the current CNT technology and identifies the growth and placement procedures that are not yet sufficient for industrial applications. Finally, the vertical CNT transistor concept is introduced which deals with the technological problems and opens a new route for 3D integration.

Carbon layer formation, comprises precipitating a layer by introducing a carbon containing gas to a hydrogen atmosphere at high pressure and temperature

Abstract: A process for producing a carbon layer with a specific resistance less than 1mOhmcm and a hardness of 2-9Gpa, comprises precipitating the carbon layer. The substrate is in a hydrogen atmosphere with a pressure of 1-4 hectopascals and a temperature of 600-1000o>C. A gas containing carbon is added to form the carbon layer.

IC-Chip with nanowire devices and dummy nanowire devices

Abstract: of EP1505646Silicon nanowires (3) included, are blanks, being interrupted by dielectric (12), e.g. silica or silicon nitride.

Storage device for storing electric charge and method for producing the same

Abstract: The invention relates to a storage device (100) for storing electric charge. Said storage device comprises a substrate (101), at least one storage cell (107) disposed on said substrate (101) and comprising a first electrode element (102), an insulating layer (103) and a second electrode element (104), thereby presenting a capacitive element. The first electrode element (102) that is electrically connected to the substrate (101) is provided in the form of a nanotube (NT) that has a high aspect ratio.

Catalytic CVD of SWCNTs at Low Temperatures and SWCNT Devices

Abstract: New results on the planar growth of single‐walled carbon nanotubes (SWCNTs) by catalytic chemical vapor deposition (CVD) at low temperatures will be reported. Optimizing catalyst, catalyst support, and growth parameters yields SWCNTs at temperatures as low as 600 °C. Growth at such low temperatures largely affects the diameter distribution since coalescence of the catalyst is suppressed. A phenomenological growth model will be suggested for CVD growth at low temperatures. The model takes into account surface diffusion and is an alternative to the bulk diffusion based vapor‐liquid‐solid (VLS) model. Furthermore, carbon nanotubes field effect transistors based on substrate grown SWCNTs will be presented. In these devices good contact resistances could be achieved by electroless metal deposition or metal evaporation of the contacts.

Faster and Smaller with Carbon Nanotubes

Abstract: Carbon Nanotubes seem to be one of the most promising candidates for nanoelectronic devices beyond presumable scaling limits of silicon and compound semiconductors and independent from lithographic limitations. Discovered only about a decade ago, there has been a tremendous advance in the field of carbon nanotubes. Their exciting properties, especially with respect to electronic applications, and their fabrication methods will be discussed. A variety of Carbon Nanotube based electronic devices, such as interconnects, transistors, and power transistors, will be presented. However, large-scale integration of carbon nanotubes seems to be a huge challenge. Some of the integration issues will be critically addressed and carbon nanotubes will be compared with some other nanoscale approaches.

Integriertes elektronisches Bauelement mit gezielt erzeugten Nanoröhren in vertikalen Strukturen und dessen Herstellungsverfahren

Abstract: Die vorliegende Erfindung betrifft ein integriertes elektronisches Bauelement, umfassend ein Substrat, mindestens ein Metall-Mehrschichtsystem, das mindestens bereichsweise auf dem Substrat angeordnet ist, und eine auf dem Metall-Mehrschichtsystem angeordnete, nicht-leitende Schicht, die mindestens ein Kontaktloch aufweist, worin mindestens eine Nanorohre am Boden des Kontaktlochs an dem Metall-Mehrschichtsystem aufgewachsen ist, wobei das Metall-Mehrschichtsystem aus einer hochschmelzenden Metallschicht, einer Metalltrennschicht und einer Katalysatorschicht aufgebaut ist. Ferner betrifft die vorliegende Erfindung ein Verfahren zur gezielten Erzeugung von Nanorohren in vertikalen Strukturen sowie die Verwendung eines Metall-Mehrschichtsystems zur gezielten Herstellung von Nanorohren in vertikalen Strukturen.

Procede servant a deposer un materiau de carbone conducteur sur un semi-conducteur pour creer un contact schottky et dispositif de contact de semi-conducteur

Abstract: L'invention concerne un procede servant a deposer un materiau de carbone conducteur (17) sur un semi-conducteur (14) afin de creer un contact Schottky (16). Ce procede consiste a: introduire un semi-conducteur (14) dans une chambre de traitement (10), rechauffer l'interieur (10') de la chambre de traitement (10) a une temperature determinee, faire le vide dans la chambre de traitement (10) jusqu'a un niveau egal ou inferieur a une premiere pression determinee, rechauffer l'interieur (10') de la chambre de traitement (10) a un deuxieme niveau egal a une temperature determinee, introduire un gaz (12) contenant au moins du carbone, jusqu'a l'obtention d'une deuxieme pression determinee superieure a la premiere pression determinee et deposer le materiau de carbone conducteur (17) sur le semi-conducteur (14) a partir dudit gaz (12), le materiau depose (17) constituant le contact Schottky (16) sur le semi-conducteur (14).

Elektrischer Schaltkreis mit einer Nanostruktur und Verfahren zum Herstellen einer Kontaktierung einer Nanostruktur Electrical circuit with a nanostructure and methods for manufacturing a contact of a nanostructure

Abstract: Ein elektrischer Schaltkreis weist zumindest eine Nanostruktur und eine Kohlenstoff-Leiterbahn auf, welche Kohlenstoff-Leiterbahn mittels einer im wesentlichen aus Kohlenstoff bestehenden Schicht ausgebildet ist, wobei die Nanostruktur und die Kohlenstoff-Leiterbahn im direkten Kontakt stehen. An electrical circuit includes at least one nanostructure, and a carbon conductor, which carbon-conductor track is formed by a substantially consisting of carbon layer, wherein the nanostructure and the carbon-conductor track are in direct contact.

Integriertes elektronisches bauelement mit gezielt erzeugten nanoröhren in vertikalen strukturen

Abstract: Die vorliegende Erfindung betrifft ein integriertes elektronisches Bauelement, umfassend ein Substrat (10), mindestens ein Metall-Mehrschichtsystem, das mindestens bereichsweise auf dem Substrat angeordnet ist, und eine auf dem MetallMehrschichtsystem angeordnete, nicht-leitende Schicht (50), die mindestens ein Kontaktloch aufweist, worin mindestens eine Nanorohre am Boden des Kontaktlochs an dem Metall-Mehrschichtsystem aufgewachsen ist, wobei das Metall-Mehrschichtsystem aus einer hochschmelzenden Metallschicht (20), einer Metalltrennschicht (30) und einer Katalysatorschicht (40) aufgebaut ist. Ferner betrifft die vorliegende Erfindung ein Verfahren zur gezielten Erzeugung von Nanorohren in vertikalen Strukturen sowie die Verwendung eines Metall-Mehrschichtsystems zur gezielten Herstellung von Nanorohren in vertikalen Strukturen.