In the paper, an analysis of the state-of-the-art of active elements for analog signal processing is presented which support - in contrast to the conven tional operational amplifiers - not only the voltage-mode but also the current- and mixed-mode operations. Several pro blems are addressed which are associated with the utiliza tion of these elements in linear applications, particularly in frequency filters. A methodology is proposed which generates a number of fundamentally new active elem ents with their potential utilization in various areas o f signal processing.

Active Elements for Analog Signal Processing: Classification, Review, and New Proposals

Analog signal processing is fast and can address real world problems. The applications of battery powered analog and mixed mode electronic devices require designing analog circuits to operate at low voltage levels. In this paper, some of the issues facing analog designers in implementing low voltage circuits are discussed, and possible low voltage design techniques are examined. The authors describe briefly almost all low voltage design techniques suitable for analog circuit structures along with their merits and demerits.

Low voltage analog circuit design techniques

In the recent past, there has been an evolution in wireless communications toward multifunctions and multistandard mobile terminals. Reducing the number of external components to a minimum is key when the same mobile terminal has to process several different standards. Highly integrated solutions in low-cost silicon technologies are thus required. Zero-IF and low-IF receiver architectures are most suitable for a high level of integration. This paper presents a review of global system for mobile communications, universal mobile telecommunication system, Bluetooth, and wireless local area network (IEEE802.11a, b, g and HiperLAN2) standards, likely to all be present in the "universal" terminal of the future, enabling global roaming and wireless connectivity. The various standards are analyzed in order to find the optimal architecture and the building-block specifications for the receive section, with particular care to the RF front-end. State-of-the-art solutions are discussed, with emphasis on direct conversion CMOS implementations. A multistandard architecture for a fully-integrated CMOS receiver is proposed.

Toward multistandard mobile terminals - fully integrated receivers requirements and architectures

In this paper, a current-mode (CM) Kerwin–Huelsman–Newcomb (KHN) biquad is proposed. The circuit employs three differential-voltage current conveyors (DVCCs) as active elements together with two capacitors and four resistors as passive elements, which all are grounded. The circuit simultaneously provides the three basic filter functions, namely bandpass (BP), highpass (HP) and lowpass (LP) functions. The notch and allpass (AP) functions can be obtained by connecting appropriate output currents directly without using additional active elements. The output signals are obtained at high output impedance ports, which is important for easy cascading in CM operation. SPICE simulation results are given to verify the theoretical analyses.

A 22.5 MHz current-mode KHN-biquad using differential voltage current conveyor and grounded passive elements

New CMOS rail to rail second generation current conveyor circuits are proposed. First a class A current conveyor circuit which operates from a single supply of 1.5 V with a rail to rail voltage swing capability is given. The circuit is then modified to work as a class AB while maintaining the rail to rail swing capability. The class AB circuit works from supply voltages down to +1.1 V with standby current of 56 /spl mu/A. These new current conveyor realizations are insensitive to the threshold voltage variation caused by the body effect, which minimizes the layout area and makes both circuits a valuable addition to the analog VLSI libraries. PSpice simulation confirms the attractive properties of the proposed circuits.

Low-voltage low-power CMOS current conveyors

Novel CMOS realisations of a differential voltage current conveyor (DVCC) are described. These circuits are powerful building blocks, especially for applications demanding differential or floating inputs like impedance converter circuits and current mode instrumentation amplifiers. Applications suitable for VLSI are then considered by using the DVCC to realise a MOS transconductor and a continuous-time current mode MOSFET-C filter. PSpice simulations indicate the excellent performance of the proposed DVCC and of its circuit applications.

Novel CMOS differential voltage current conveyor and its applications

In this paper, a novel fully differential second-generation current conveyor (FDCCII) is presented. The proposed block is useful in mixed-mode applications where fully differential signal processing is required. Furthermore, the FDCCII can be used to realize MOSFET-C filters. The circuit has a bandwidth of about 10 MHz under heavy capacitive loads and can operate from low supply voltages down to /spl plusmn/1.5 V.

A novel fully differential current conveyor and applications for analog VLSI

A new approach for designing digitally programmable CMOS integrated baseband filters is presented. The proposed technique provides a systematic method for designing filters exhibiting high linearity and low power. A sixth-order Butterworth low-pass filter with 14-bit bandwidth tuning range is designed for implementing the baseband channel-select filter in an integrated multistandard wireless receiver. The filter consumes a current of 2.25 mA from a 2.7-V supply and occupies an area of 1.25 mm/sup 2/ in a 0.5-/spl mu/m chip. The proposed filter design achieves high spurious free dynamic ranges (SFDRs) of 92 dB for PDC (IS-54), 89 dB for GSM, 84 dB for IS-95, and 80 dB for WCDMA.

A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers

A novel CMOS realization of the second generation current conveyor is given. A circuit which compensates the voltage offset due to channel length modulation effect is then developed. The CCII is then used to realize a new electronically tunable low-pass-band-pass filter suitable for VLSI. Simulation results taking the second-order effects into account indicate the excellent performance of both the CCII circuit and the filter over a wide dynamic range.

Hassan Elwan

Papers

Novel CMOS differential voltage current conveyor and its applications

Low-voltage low-power CMOS current conveyors

A novel fully differential current conveyor and applications for analog VLSI

A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers

A novel CMOS current conveyor realization with an electronically tunable current mode filter suitable for VLSI