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Journal ArticleDOI

A novel CMOS current conveyor realization with an electronically tunable current mode filter suitable for VLSI

Hassan Elwan, +1 more
- 01 Sep 1996 - 
- Vol. 43, Iss: 9, pp 663-670
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TLDR
In this article, the second generation current conveyor was used to realize a low-pass-band-pass filter suitable for VLSI with second-order effects, and simulation results indicated that the performance of both the CCII circuit and the filter over a wide dynamic range.
Abstract
A novel CMOS realization of the second generation current conveyor is given. A circuit which compensates the voltage offset due to channel length modulation effect is then developed. The CCII is then used to realize a new electronically tunable low-pass-band-pass filter suitable for VLSI. Simulation results taking the second-order effects into account indicate the excellent performance of both the CCII circuit and the filter over a wide dynamic range.

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Citations
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Journal ArticleDOI

A 22.5 MHz current-mode KHN-biquad using differential voltage current conveyor and grounded passive elements

TL;DR: In this article, a currentmode Kerwin-Huelsman-Newcomb (KHN) biquad is proposed, which employs three differential-voltage current conveyors (DVCCs) as active elements together with two capacitors and four resistors as passive elements, which all are grounded.
Journal ArticleDOI

Low-voltage low-power CMOS current conveyors

TL;DR: In this article, a new CMOS rail-to-rail second generation current conveyor circuits are proposed, which operate from supply voltages down to +1.1 V with standby current of 56 /spl mu/A.
Journal ArticleDOI

A new CMOS electronically tunable current conveyor and its application to current-mode filters

TL;DR: A new CMOS high-performance electronically tunable second-generation current conveyor (ECCII) is presented that realizes low-pass, bandpass, and high-pass responses simultaneously and can be independently tuned by changing the current gain of the relevant CC.
Journal ArticleDOI

An evolutionary approach to automatic synthesis of high-performance analog integrated circuits

TL;DR: An analog integrated circuit synthesis system based on an evolutionary approach that contains the incorporation of matching properties of devices and the high-performance optimization algorithm, which is a combination of evolutionary strategies and simulated annealing.
Journal ArticleDOI

CMOS operational transresistance amplifier for analog signal processing

TL;DR: In this article, a new CMOS realization of the Operational Transresistance Amplifier (OTRA) is introduced, which is suitable for VLSI applications employing MOS transistors operating in the ohmic region.
References
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Journal ArticleDOI

A second-generation current conveyor and its applications

TL;DR: This correspondence introduces another new building block embodying the current conveying concept, but with different and more versatile terminal characteristics, considered to be a secondgeneration current conveyor.
Journal ArticleDOI

A versatile CMOS linear transconductor/square-law function

TL;DR: A simple CMOS circuit technique for realizing both linear transconductance and a precision square-law function is described, which is versatile in application and diverse applications are demonstrated in the fields of linear amplifiers, continuous-time filters, and nonlinear function implementation.
Journal ArticleDOI

A high-frequency CMOS linear transconductance element

TL;DR: In this article, a simple four-transistor, linear, tunable, high-frequency transconductance element is described, which achieves its linearity by current differencing without undue matching requirements.
Journal ArticleDOI

3 V MOS current conveyor cell for VLSI technology

TL;DR: In this article, an MOS current conveyor design suitable for VLSI implementation is described, which uses a new circuit architecture which allows for low supply voltage operation at 3V enhancing its application versatility as a standard cell.
Journal ArticleDOI

An enhancement-mode MOS voltage-controlled linear resistor with large dynamic range

TL;DR: In this article, the depletion-mode linear resistor of Babanezhad and Temes (IEEE J. SC-19, p.932-8, 1984) is implemented in enhancement-mode devices.
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