H
Hector Posadas
Researcher at University of Cantabria
Publications - 54
Citations - 707
Hector Posadas is an academic researcher from University of Cantabria. The author has contributed to research in topics: SystemC & Design space exploration. The author has an hindex of 15, co-authored 53 publications receiving 681 citations. Previous affiliations of Hector Posadas include University of Castilla–La Mancha.
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Proceedings ArticleDOI
Systematic embedded software generation from SystemC
TL;DR: This paper presents a method for systematic embedded software generation that reduces the software generation cost in a platform-based HW/SW codesign methodology for embedded systems based on SystemC.
Journal ArticleDOI
RTOS modeling in SystemC for real-time embedded SW simulation: A POSIX model
TL;DR: Techniques are proposed to accurately model the detailed RTOS functionality on top of the SystemC execution kernel, which allows timed-simulation and refinement of the RT/E SW code in SystemC.
Proceedings ArticleDOI
MULTICUBE: Multi-objective Design Space Exploration of Multi-core Architectures
Cristina Silvano,William Fornaciari,Gianluca Palermo,Vittorio Zaccaria,F. Castro,Marcos Martinez,S. Bocchio,Roberto Zafalon,Prabhat Avasare,Geert Vanmeerbeeck,Chantal Ykman-Couvreur,Maryse Wouters,Carlos Kavka,Luka Onesti,Alessandro Turco,Umberto Bondi,Giovanni Mariani,Hector Posadas,Eugenio Villar,Chris Wu,Fan Dong-rui,Zhang Hao,Tang Shibin +22 more
TL;DR: The main goal of the MULTICUBE project consists of the definition of an automatic Design Space Exploration framework to support the design of next generation many-core architectures.
Journal ArticleDOI
The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems
Fernando Herrera,Hector Posadas,Pablo Peñil,Eugenio Villar,Francisco Ferrero,Raúl Valencia,Gianluca Palermo +6 more
TL;DR: The COMPLEX UML/MARTE Design Space Exploration methodology is presented, an approach based on a novel combination of Model Driven Engineering, Electronic System Level and design exploration technologies, which enables capturing the set of possible design solutions in an abstract, standard and graphical way.
Proceedings ArticleDOI
System-level performance analysis in SystemC
TL;DR: A C++ library for timing estimation at system level based on a general and systematic methodology that takes as input the original SystemC source code without any modification and provides the estimation parameters by simply including the library within a usual simulation.