Probability Distributions.- Linear Models for Regression.- Linear Models for Classification.- Neural Networks.- Kernel Methods.- Sparse Kernel Machines.- Graphical Models.- Mixture Models and EM.- Approximate Inference.- Sampling Methods.- Continuous Latent Variables.- Sequential Data.- Combining Models.

Pattern Recognition and Machine Learning

Fundamentals Of Statistical Signal Processing

Monte Carlo methods are revolutionizing the on-line analysis of data in fields as diverse as financial modeling, target tracking and computer vision. These methods, appearing under the names of bootstrap filters, condensation, optimal Monte Carlo filters, particle filters and survival of the fittest, have made it possible to solve numerically many complex, non-standard problems that were previously intractable. This book presents the first comprehensive treatment of these techniques, including convergence results and applications to tracking, guidance, automated target recognition, aircraft navigation, robot navigation, econometrics, financial modeling, neural networks, optimal control, optimal filtering, communications, reinforcement learning, signal enhancement, model averaging and selection, computer vision, semiconductor design, population biology, dynamic Bayesian networks, and time series analysis. This will be of great value to students, researchers and practitioners, who have some basic knowledge of probability. Arnaud Doucet received the Ph. D. degree from the University of Paris-XI Orsay in 1997. From 1998 to 2000, he conducted research at the Signal Processing Group of Cambridge University, UK. He is currently an assistant professor at the Department of Electrical Engineering of Melbourne University, Australia. His research interests include Bayesian statistics, dynamic models and Monte Carlo methods. Nando de Freitas obtained a Ph.D. degree in information engineering from Cambridge University in 1999. He is presently a research associate with the artificial intelligence group of the University of California at Berkeley. His main research interests are in Bayesian statistics and the application of on-line and batch Monte Carlo methods to machine learning. Neil Gordon obtained a Ph.D. in Statistics from Imperial College, University of London in 1993. He is with the Pattern and Information Processing group at the Defence Evaluation and Research Agency in the United Kingdom. His research interests are in time series, statistical data analysis, and pattern recognition with a particular emphasis on target tracking and missile guidance.

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Sequential Monte Carlo methods in practice

物件導向軟體之架構(Object-Oriented Software Construction)探討

This paper presents an overview of progress in the area of multiple input multiple output (MIMO) space-time coded wireless systems. After some background on the research leading to the discovery of the enormous potential of MIMO wireless links, we highlight the different classes of techniques and algorithms proposed which attempt to realize the various benefits of MIMO including spatial multiplexing and space-time coding schemes. These algorithms are often derived and analyzed under ideal independent fading conditions. We present the state of the art in channel modeling and measurements, leading to a better understanding of actual MIMO gains. Finally, the paper addresses current questions regarding the integration of MIMO links in practical wireless systems and standards.

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From theory to practice: an overview of MIMO space-time coded wireless systems

SIMD instructions are used to speed up multimedia applications in high performance embedded computing. Vendors often use proprietary platforms which are incompatible with others. Therefore, porting software is a very complex and time consuming task. Moreover, lots of existing embedded processors do not have SIMD extensions at all. But they do provide a wide data path which is 32-bit or wider. Usually, multimedia applications work on short data types of 8 or 16-bit. Thus, only the lower bits of the data path are used and therefore only a fraction of the available computing power is exploited for such algorithms. This paper discusses the possibility to make use of the upper bits of the data path by emulating true SIMD instructions. These instructions are implemented purely in software using a high level language such as C. Therefore, the application can be modified by making use of source code transformations which are inherently portable. The benefit of this approach is that the computing resources are used more efficiently without compromising the portability of the code. Experiments have shown that a significant speedup can be obtained by this approach.

Interactive presentation: SoftSIMD - exploiting subword parallelism using source code transformations

We describe the algorithm architecture development and implementation of a DMSK receiver prototype on a field programmable gate array (FPGA). The algorithm provides fast acquisition as well as a simple implementation and is suited for use in broadcast networks due to the exploitation of the capture phenomenon. During the design process we utilized a novel methodology involving multirate dynamic data flow system level simulation, exploitation of a generic VHDL based implementation library, automatic VHDL generation based on the data flow description and logic synthesis. The advantages and current limitations of this approach as well as the algorithm and implementation trade-offs are discussed.

Rapid prototyping of a DMSK transceiver

Translating to a hardware description language (HDL) from an architecture description language (ADL) is disclosed. An architecture description that is written in the ADL and has a hierarchical organization is received. Decoders are generated, described in the HDL, from the architecture description written in the ADL. Control signals are generated, described in the HDL, from the architecture description written in the ADL. The decoders are configured to output the control signals and the control signals are input to functional units in order to preserve the hierarchical organization of the architecture description written in the ADL.

Method and apparatus for translating to a hardware description language from an architecture description language

The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements. However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWare s BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores. In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms. The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation.

Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms

In this paper a Rake finger grid structure for direct-sequence code division multiple access (DS-CDMA) systems is analyzed as an alternative to the conventional Rake structure using individual fingers with timing- and phasor tracking. The grid uses a group of equispaced Rake fingers in the delay domain. Each of the Rake fingers uses linear minimum mean-squared error (LMMSE) tap weight estimation needed for the subsequent maximum-ratio combining (MRC). It is pointed out during the paper that the use of a grid is advantageous compared to the conventional Rake receiver in some scenarios where the channel forms so called clusters, consisting of many unresolvable, closely spaced multipaths. It is also shown that when using fractionally-spaced grid fingers, the task of fine timing tracking can be omitted. Only coarse timing estimation is necessary, which can be performed by a suitable acquisition unit.

Heinrich Meyr

Papers

Interactive presentation: SoftSIMD - exploiting subword parallelism using source code transformations

Rapid prototyping of a DMSK transceiver

Method and apparatus for translating to a hardware description language from an architecture description language

Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms

A rake finger grid for asynchronous DS-CDMA systems using LMMSE tap weight estimation