H
Heungsik Park
Researcher at Samsung
Publications - 22
Citations - 378
Heungsik Park is an academic researcher from Samsung. The author has contributed to research in topics: Substrate (printing) & Layer (electronics). The author has an hindex of 6, co-authored 22 publications receiving 373 citations.
Papers
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Proceedings ArticleDOI
High performance 5nm radius Twin Silicon Nanowire MOSFET (TSNWFET) : fabrication on bulk si wafer, characteristics, and reliability
Sung Dae Suk,Sung-young Lee,Sung-min Kim,Eun-Jung Yoon,Min-Sang Kim,Ming Li,Chang Woo Oh,Kyoung Hwan Yeo,Sung Hwan Kim,Dong-Suk Shin,Kwan-Heum Lee,Heungsik Park,Jeorig Nam Han,Choong-Hee Park,Jong-Bong Park,Dong-Won Kim,Donggun Park,Byung-Il Ryu +17 more
TL;DR: For the first time, a gate-all-around twin silicon nanowire transistor (TSNWFET) was successfully fabricated on bulk Si wafer using self-aligned damascene-gate process.
Patent
Method for etching an object using a plasma and an object etched by a plasma
TL;DR: In this article, a method for etching a face of an object and more particularly a rear face of a silicon substrate is described. But the method is not suitable for the case of a single face.
Journal ArticleDOI
High-performance, in-plane switching liquid crystal device utilizing an optically isotropic liquid crystal blend of nanostructured liquid crystal droplets in a polymer matrix
Nam Ho Cho,Prasenjit Nayek,Jung Jin Lee,Young Jin Lim,Joong Hee Lee,Seung Hee Lee,Heungsik Park,Hyuck Jin Lee,Hee Seop Kim +8 more
TL;DR: In this article, a light scatter-free, transparent, thermally stable, optically isotropic liquid crystal mixture was achieved among three different mixtures of liquid crystal E7: Norland Optical Adhesive 65 with concentrations 30:70, 40:60, and 50:50
Patent
Method for manufacturing semiconductor device having a metal gate electrode
Dong-Kwon Kim,Young-Ju Park,Dong-Hyuk Yeam,Yoo-Jung Lee,Myeong-cheol Kim,Do-hyoung Kim,Heungsik Park +6 more
TL;DR: In this paper, a method for manufacturing a semiconductor device without a void in a lower portion of the metal gate electrode is described, where a dummy gate electrode and a gate spacer are placed on the substrate.
Patent
Method of fabricating a semiconductor integrated circuit device
TL;DR: In this article, the methods of fabricating a semiconductor integrated circuit device are disclosed, which include forming a hard mask layer on a base layer, forming a line sacrificial hard masks on the hard mask layers in a first direction, coating a high molecular organic material layer on the line hard masks in a second direction, and forming a matrix hard masks as an etching mask in a third direction.