https://www.cell.com/joule/pdfExtended/S2542-4351(20)30035-0

Blade-Coated Perovskites on Textured Silicon for 26%-Efficient Monolithic Perovskite/Silicon Tandem Solar Cells

We fabricated active single- and bilayer structure thin film transistors (TFTs) with aluminum or gallium doped (IZO:Al or IZO:Ga) and undoped indium zinc oxide (IZO) thin film layers using an aqueous solution process. The electrical performance and bias stability of these active single- and bilayer structure TFTs were investigated and compared to reveal the effects of Al/Gal doping and bilayer structure. The single-layer structure IZO TFT shows a high mobility of 19 cm2/V·s with a poor positive bias stability (PBS) of ΔVT + 3.4 V. However, Al/Ga doped in IZO TFT reduced mobility to 8.5–9.9 cm2/V·s but improved PBS to ΔVT + 1.6–1.7 V due to the reduction of oxygen vacancy. Thus, it is found the bilayer structure TFTs with a combination of bottom- and top-layer compositions modify both the mobility and bias stability of the TFTs to be optimized. The bilayer structure TFT with an IZO:X bottom layer possess high mobility and an IZO bottom layer improves the PBS.

Improved electrical performance and bias stability of solution-processed active bilayer structure of indium zinc oxide based TFT.

Nontoxic, Eco-friendly Fully Water-Induced Ternary Zr–Gd–O Dielectric for High-Performance Transistors and Unipolar Inverters

Metal oxide thin films are critical components in modern electronic applications. In particular, high-κ dielectrics are of interest for reducing power consumption in metal–insulator–semiconductor (MIS) field-effect transistors. Although thin-film materials are typically produced via vacuum-based methods, solution deposition offers a scalable and cost-efficient alternative. We report an all-inorganic aqueous solution route to amorphous lanthanum zirconium oxide (La2Zr2O7, LZO) dielectric thin films. LZO films were spin-cast from aqueous solutions of metal nitrates and annealed at temperatures between 300 and 600 °C to produce dense, defect-free, and smooth films with subnanometer roughness. Dielectric constants of 12.2–16.4 and loss tangents <0.6% were obtained for MIS devices utilizing LZO as the dielectric layer (1 kHz). Leakage currents <10–7 A cm–2 at 4 MV cm–1 were measured for samples annealed at 600 °C. The excellent surface morphology, high dielectric constants, and low leakage current densities ma...

High-κ Lanthanum Zirconium Oxide Thin Film Dielectrics from Aqueous Solution Precursors.

Technologies of device printing have been widely explored, but existing printing techniques still cannot produce well-defined patterns required by fine electronic devices. Here, a new printing method is proposed and the printing of metal-oxide patterns with well-defined shapes was demonstrated. Excellent thin-film transistors with channel lengths around 500 nm were completely printed by this method in an air atmosphere. This printing utilizes a viscoelastic transformation of the precursor gel when imprinted; it softens at a certain temperature during thermal-imprinting so that the gel can be rheologically imprinted. The imprinted pattern shows very small shrinkage during post-annealing, thereby achieving a high shape fidelity to the mould; this results from metal-oxide condensation at imprinting. The viscoelastic transformation and metal-oxide condensation at imprinting constitute the basis for this printing method, which is closely related to the cluster structure in the precursor gel. This method has worked for patterns down to several tens of nanometers.

Rheology printing for metal-oxide patterns and devices

We report on the high performance and high stability of thin-film transistors (TFTs) using solution-processed Zr-In-Zn-O (ZIZO) as an active layer. The effects of adding Zr to In-Zn-O, particularly the electrical characteristics of their thin films and TFTs, were systematically investigated. The Zr effectively controlled the oxygen vacancies because of its low standard electrode potential, which was confirmed by modifications in the optical bandgap energy, carrier concentration, and oxygen-vacancy density of the ZIZO thin films. Consequently, we found that the “off” current decreased and the threshold voltage increased with the increasing Zr content. The optimal ZIZO TFT was obtained at a Zr/In/Zn mole ratio of 0.05 : 2 : 1, and its “on/off” ratio, channel mobility, and subthreshold swing voltage were ~ 109 , 6.23 cm2·V-1·s-1 , and 0.19 V/dec, respectively, which are comparable to those of vacuum-processed oxide TFTs. Furthermore, the performance and bias-stress stability of the ZIZO TFTs were improved as a result of the reduced interface charge trapping.

High-Performance Solution-Processed ZrInZnO Thin-Film Transistors

To realize all-solution-processed oxide semiconductor thin-film transistors (TFTs), for use in display applications in particular, a polysilazane-based SiO2 gate insulator is investigated. The gate leakage current was reduced to 1 × 10-8 A/cm2 at 1 MV/cm. TFTs were successfully fabricated using a ZrInZnO precursor solution for the active layer and a polysilazane-based solution for the gate insulator. A smooth interface without defects was confirmed in the ZrInZnO/SiO2 system. The resulting TFTs exhibited a field-effect mobility of 19-29 cm2·V-1·s-1 with a low leakage current of less than 9 × 10-11 A. These results are very promising for the development of all-solution-processed oxide semiconductor TFTs, which have the potential to replace TFTs fabricated by vacuum deposition methods.

Investigation of Polysilazane-Based $\hbox{SiO}_{2}$ Gate Insulator for Oxide Semiconductor Thin-Film Transistors

In this paper, we show a novel method to obtain small size textures usable in crystalline silicon (c-Si) solar cells. SiO2-based glass microparticles are mixed with a conventional KOH-based alkaline solution for making the textures. Using this mixing method, the texture size can be drastically reduced from 10 to ≤2 µm (0.3–2 µm). In addition, the process time and c-Si loss during the texture formation are reduced from 25 to 2 min and from 20 to 2 µm, respectively. Thus, the process is applicable to c-Si with thickness down to 50 µm. High-quality passivation showing the effective minority carrier lifetimes (τeff) larger than several ms and effective antireflection coating are possible on the new textures. The process is named “microparticle-assisted texturing (MPAT) process”, and its features are also demonstrated.

Texture size control by mixing glass microparticles with alkaline solution for crystalline silicon solar cells

An ultra-thin silicon nitride (SiN x ) layer formed by catalytic chemical vapor deposition (Cat-CVD) is used to replace the Si dioxide (SiO2) layer of a tunnel oxide passivated contact solar cell. The passivation quality of crystalline Si (c-Si) with a stack of the ultra-thin SiN x and n-type hydrogenated amorphous Si (a-Si:H) or microcrystalline Si (μc-Si:H), also formed by Cat-CVD, is significantly improved by annealing at 850 °C, probably due to the formation of a back surface field layer. Cat-CVD SiN x with thicknesses of up to 2.5 nm can have sufficient tunneling conduction. The ultra-thin SiN x having functions of surface passivation and carrier tunneling, and the unification of the formation method for the tunnel SiN x and conductive layers will lead to the realization of tunnel nitride passivated contact solar cells.

https://iopscience.iop.org/article/10.35848/1347-4065/abdccd/pdf

Tunnel nitride passivated contacts for silicon solar cells formed by catalytic CVD

In this paper, we report a novel doping method based on a solution process to fabricate source and drain regions of a self-aligned ZrInZnO thin-film transistor (TFT). A solution of Sn compound mixed with poly(propylene carbonate) (PPC) was used to allow Sn to be diffused into ZrInZnO source and drain regions. The resistivity of the obtained Sn-doped ZrInZnO was reduced dramatically from 4 × 103 to 1.8 × 10−2 Ω cm. The self-aligned ZrInZnO TFT exhibited a mobility of 20 cm2 V−1 s−1, a threshold voltage of 1 V, a subthreshold swing of 0.2 V/decade, and an ON/OFF ratio of 7. These results indicate that the solution-based doping could provide an alternative way to substitute the ion implantation or plasma treatment which are conducted under vacuum for fabrication of the self-aligned oxide semiconductor TFT.

http://iopscience.iop.org/article/10.7567/JJAP.54.106501/pdf

Huynh Thi Cam Tu

Papers

High-Performance Solution-Processed ZrInZnO Thin-Film Transistors

Investigation of Polysilazane-Based $\hbox{SiO}_{2}$ Gate Insulator for Oxide Semiconductor Thin-Film Transistors

Texture size control by mixing glass microparticles with alkaline solution for crystalline silicon solar cells

Tunnel nitride passivated contacts for silicon solar cells formed by catalytic CVD

Fabrication of source and drain regions of self-aligned ZrInZnO thin-film transistors using a solution of tin and poly(propylene carbonate)