J. Jakusz

TL;DR: In this paper, a linear, fully balanced, voltage-tunable CMOS operational transconductance amplifier (OTA) with large dc gain and wide bandwidth is described, which uses a two-differential-pair transconductor with a cross-coupled input stage together with a negative resistance load for compensating the parasitic output resistance of the OTA.

TL;DR: A new approach to an analog ultra-low power medium-resolution vision chip design that is able to realize any convolution algorithm based on a full 3 × 3 kernel is presented.

TL;DR: In this article, a high-frequency fully differential CMOS operational transconductance amplifier (OTA) is presented for continuous-time filter applications in the megahertz range, which combines a linear cross-coupled quad input stage with an enhanced folded-cascode circuit to increase the output resistance of the amplifier.

TL;DR: A CMOS pixel that contains all necessary functional blocks: a photosensor and an analog-to-digital converter with built-in correlated double sampling (CDS) integrated together is proposed for imaging arrays with massively parallel image acquisition and simultaneous compensation of dark signal nonuniformity (DSNU) as well as photoresponse nonun uniformity (PRNU).

TL;DR: The architecture concept of a high-speed low-power analogue vision chip, which performs low-level real-time image algorithms is presented, and the experimental results are presented and discussed.