J
Jae Hur
Researcher at Georgia Institute of Technology
Publications - 78
Citations - 1284
Jae Hur is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Transistor & Field-effect transistor. The author has an hindex of 13, co-authored 62 publications receiving 756 citations. Previous affiliations of Jae Hur include KAIST.
Papers
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Vertically stacked thin triboelectric nanogenerator for wind energy harvesting
TL;DR: In this paper, a vertically stacked triboelectric nanogenerator (VS-TENG) is investigated, where a thin and flexible polymer membrane repeatedly comes in contact with and separates from upper and lower electrodes.
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Nature‐Replicated Nano‐in‐Micro Structures for Triboelectric Energy Harvesting
TL;DR: Triboelectric nanogenerators with nature-replicated interface structures are presented that allow the improved humidity resistance, which is an important parameter for the stable energy harvesting.
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First Demonstration of a Logic-Process Compatible Junctionless Ferroelectric FinFET Synapse for Neuromorphic Applications
Myungsoo Seo,Minho Kang,Seung-Bae Jeon,Hagyoul Bae,Jae Hur,Byung Chul Jang,Seokjung Yun,Seongwoo Cho,Wu-Kang Kim,Myung-Su Kim,Kyu-Man Hwang,Seungbum Hong,Sung-Yool Choi,Yang-Kyu Choi +13 more
TL;DR: In this paper, a junctionless junctionless ferroelectric (FE) FinFET was proposed for neuromorphic applications, which showed distinguishable polarization switching behaviors with gradually controllable channel conductance.
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Comprehensive Analysis of Gate-Induced Drain Leakage in Vertically Stacked Nanowire FETs: Inversion-Mode Versus Junctionless Mode
TL;DR: In this paper, the gate-induced drain leakage (GIDL) current of vertically stacked nanowire (VS-NW) FETs was analyzed, and two different operational modes of the VS-NW, an inversion mode (IM) and a junctionless mode (JM), were compared.
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A Vertically Integrated Junctionless Nanowire Transistor
Byung-Hyun Lee,Byung-Hyun Lee,Jae Hur,Minho Kang,Tewook Bang,Dae-Chul Ahn,Dongil Lee,Kwang-Hee Kim,Yang-Kyu Choi +8 more
TL;DR: The proposed VJ-FET mitigates the issues of variability and fabrication complexity that are encountered in the vertically integrated multi-NW FET based on an identical structure and the endurance and retention characteristics are improved due to the above-mentioned bulk conduction.