Solid-state switch-mode rectification converters have reached a matured level for improving power quality in terms of power-factor correction (PFC), reduced total harmonic distortion at input AC mains and precisely regulated DC output in buck, boost, buck-boost and multilevel modes with unidirectional and bidirectional power flow. This paper deals with a comprehensive review of improved power quality converters (IPQCs) configurations, control approaches, design features, selection of components, other related considerations, and their suitability and selection for specific applications. It is targeted to provide a wide spectrum on the status of IPQC technology to researchers, designers and application engineers working on switched-mode AC-DC converters. A classified list of more than 450 research publications on the state of art of IPQC is also given for a quick reference.

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A review of single-phase improved power quality AC-DC converters

The authors discuss high-voltage power conversion. Conventional series connection and three-level voltage source inverter techniques are reviewed and compared. A novel versatile multilevel commutation cell is introduced: it is shown that this topology is safer and more simple to control, and delivers purer output waveforms. The authors show how this technique can be applied to either choppers or voltage-source inverters and generalized to any number of switches.<<ETX>>

Multi-level conversion : high voltage choppers and voltage-source inverters

Introduction to Electromagnetic Compatibility

In the first part of this paper, three-phase power factor correction (PFC) rectifier topologies with sinusoidal input currents and controlled output voltage are derived from known single-phase PFC rectifier systems and/or passive three-phase diode rectifiers. The systems are classified into hybrid and fully active pulsewidth modulation boost-type or buck-type rectifiers, and their functionality and basic control concepts are briefly described. This facilitates the understanding of the operating principle of three-phase PFC rectifiers starting from single-phase systems, and organizes and completes the knowledge base with a new hybrid three-phase buck-type PFC rectifier topology denominated as Swiss Rectifier. Finally, core topics of future research on three-phase PFC rectifier systems are discussed, such as the analysis of novel hybrid buck-type PFC rectifier topologies, the direct input current control of buck-type systems, and the multi-objective optimization of PFC rectifier systems. The second part of this paper is dedicated to a comparative evaluation of four rectifier systems offering a high potential for industrial applications based on simple and demonstrative performance metrics concerning the semiconductor stresses, the loading and volume of the main passive components, the differential mode and common mode electromagnetic interference noise level, and ultimately the achievable converter efficiency and power density. The results are substantiated with selected examples of hardware prototypes that are optimized for efficiency and/or power density.

The Essence of Three-Phase PFC Rectifier Systems—Part II

An advantage for some wide bandgap materials, that is often overlooked, is that the thermal coefficient of expansion (CTE) is better matched to the ceramics in use for packaging technology. It is shown that the optimal choice for uni-polar devices is clearly GaN. It is further shown that the future optimal choice for bipolar devices is C (diamond) owing to the large bandgap, high thermal conductivity, and large electron and hole mobilities. A new expression relating the critical electric field for breakdown in abrupt junctions to the material bandgap energy is derived and is further used to derive new expressions for specific on-resistance in power semiconductor devices. These new expressions are compared to the previous literature and the efficacy of specific power devices, such as heterojunction MOSFETs, using GaN are discussed.

An assessment of wide bandgap semiconductors for power devices

Wide Bandgap Devices (WBD) are expected to be used in high efficiency, high frequency and high temperature power converters. In this paper, a special pulse mode buck converter characterization bench is presented. It allows to precisely evaluate the impact of the operating point and the temperature on the WBD switching performances with the least possible interferences and the maximum level of flexibility. An electro-thermal simulation shows that the thermal stress due to the device characterization is considerably reduced, compared to the classical double pulse method, therefore removing the need of a thermal conductive packaging for the DUT. Indeed the desired switching conditions are smoothly set in less than 3 ms by an auxiliary transistor before the WBD under test switches only one time. Finally a SiC JFET has been characterized on a wide range with a single inductor until 250V/20A and up to 150°C to study its switching characteristics dependency.

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A specific switching characterization method for evaluation of operating point and temperature impacts on wide bandgap devices

This paper presents the design and the implementation of distributed, series connected DC/AC micro-converters in a multi panel/cell photovoltaic system for stand-alone applications. The proposed topology is based on the direct, low voltage DC/AC energy conversion at PV panel/cell level using micro-inverters, integrated in a standard CMOS ASIC. In such a way, they can be physically implemented into the junction box on the backside of each PV module, replacing the bypass diodes. This approach maximizes the amount of harvested energy thanks to the single stage conversion architecture and the individual maximum power point tracking (MPPT) for each PV module. Among other advantages, this distributed approach benefits from interleaved control strategies allowing down scaling of the volume of the output inductor and the EMI filters and offering an increased apparent switching frequency and a reduced current ripple. The experimental validation of the approach is carried out with a string of four low power PV tiles (10W).

Analysis and prototyping of distributed series connected DC/AC converters integrated in PV panels

In this paper, a multi-step packaging (MSP) concept for series-connected SiC-MOSFETs is analyzed The parasitic capacitance generated by the dielectric isolation of each device in the stack has a significant impact on the dynamic behavior of SiC devices, which impacts the voltage-sharing performances The study performed in this work reveals that the parasitic capacitance network introduced by the classical planar packaging unbalances the voltage across the series-connected SiC-MOSFETs Therefore, a new drain-source parasitic capacitance network configuration provided by the MSP is proposed in order to improve the voltage balancing across the series-connected devices The concept is introduced and analyzed thanks to equivalent models and time domain simulations To verify the analysis, the voltage sharing between four series-connected 12 kV SiC MOSFETs is tested in a double pulse test setup The experimental results confirm that the MSP has a better performance than the classical one in terms of voltage sharing Furthermore, the proposed investigation shows that the MSP increases the middle point dv/dt of the switching cell Sensitive analysis and thermal management considerations are also discussed in order to clarify the MSP limitations and indicate the ways to optimize the MSP from a thermal point of view

Analysis of the Multi-Steps Package (MSP) for Series-Connected SiC-MOSFETs

The paper presents an effective optimization strategy applied in a physical structure optimization of a semiconductor Power MOSFET with expensive constraint computations. In order to deals with inaccuracy due to inevitable numerical errors in the objective function calculation (the power losses of the power MOSFET), the paper proposes to use the Progressive Quadratic Response Surface Method (PQRSM). The paper focuses on three aspects: the inevitable numerical errors in the power losses computation, the PQRSM principle, and finally the comparisons of several optimization methods on this problem.

https://hal.archives-ouvertes.fr/hal-00520046/document

Application of progressive quadratic response surface method for an oscillation problem optimization

Novel power semiconductor devices such as GaN High Electron Mobility transistors and SiC MOSFET are allowing significant improvements on switching speeds. Currently, gate drivers are one of the main limitations preventing the highest switching speed operation of wide bandgap power transistors. More especially, isolation barriers are limiting the Common-Mode Transient Immunity (CMTI) of dedicated gate drivers. Here, we propose two CMOS gate drivers with integrated optical receivers to transfer both the gate signal and the gate driver supply directly by light. Two technologies are considered, namely bulk 0.18um CMOS and 0.18um SOI CMOS, both having ultra-low propagation delays and pulse width distortions. The proposed optical interconnect with optical fibers allows extreme CMTI values, defined by the packaging and the distance between light emitting devices and the CMOS gate drivers. These integrated CMOS gate drivers will offer the fastest switching speeds for wide bandgap power transistors.

Jean-Christophe Crebier

Papers

A specific switching characterization method for evaluation of operating point and temperature impacts on wide bandgap devices

Analysis and prototyping of distributed series connected DC/AC converters integrated in PV panels

Analysis of the Multi-Steps Package (MSP) for Series-Connected SiC-MOSFETs

Application of progressive quadratic response surface method for an oscillation problem optimization

CMOS gate drivers with integrated optical interfaces for extremely fast power transistors