Showing papers by "Jean-Michel Portal published in 2013"

Compact modeling solutions for OxRAM memories

Abstract: Emerging non-volatile memories based on resistive switching mechanisms pull intense R&D efforts from both academia and industry. Oxide-based Resistive Random Acces Memories (namely OxRAM) gather noteworthy performances, such as fast write/read speed, low power and high endurance outperforming therefore conventional Flash memories. To fully explore new design concepts such as distributed memory in logic, OxRAM compact models have to be developed and implemented into electrical simulators to assess performances at a circuit level. In this paper, we present an compact models of the bipolar OxRAM memory based on physical phenomenons. This model was implemented in electrical simulators for single device up to circuit level.

Embedded high-precision frequency-based capacitor measurement system

Abstract: This paper presents a direct way to measure the electrical value of capacitors embedded in a circuit using a ring-oscillator. A calibration system ensures robustness towards temperature, power supply and process variations. The measurement is largely automated to minimize the use of external instrumentation and to speed-up the measurement process while giving a digital signature of the capacitor value. Design-Of-Experiment (DOE) methodology has been conducted in order to validate the ability of the system to measure robustly a large range of small capacitors.

Operation and stability analysis of bipolar OxRRAM-based Non-Volatile 8T2R SRAM as solution for information back-up

Abstract: This work presents a Non-Volatile SRAM (NV-SRAM) cell, resilient to information loss. The cell features fast storage (20 ns) for the operating voltage of 1.0 V. The information is backed-up during POWER-DOWN/RESTORE cycle in two bipolar Oxide Resistive RAMs (OxRRAMs). The proposed NV-SRAM is designed with an 8T2R structure using 22 nm FDSOI technology and resistive memory devices based on HfO 2 . The stability and the reliability of the NV-SRAM cell is investigated by taking into account the variability of the transistors. It is shown that high R OFF / R ON is necessary to ensure reliable RESTORE operation and high SRAM yield under cell area and power consumption constraints.

A hybrid CBRAM/CMOS Look-Up-Table structure for improving performance efficiency of Field-Programmable-Gate-Array

Abstract: At most advanced technology nodes, Field Programmable Gate Arrays (FPGA) present great advantages compared to more conventional processor architectures; their natural regularity, modularity and inherent reliability due to duplicated identical tiles provide a solution to overcome new technologies with increasing variability. However, FPGA market is still limited by power efficiency issue, due to two coordinated factors like interconnection-dominated design and large usage of memories, computation being performed thanks to Look-Up-Table (LUT). In this paper, we propose a solution to improve the performance and reduce the power consumption of LUT in FPGA using CBRAM-based structures. Our proposed design shows significant improvement compared to the traditional SRAM-based FPGA in: critical delay is reduced by ~23% due to compact structure (1T-2R) and power gain by reduction in static power consumption by ~18%.

A CBRAM-based compact interconnect switch for non-volatile reconfigurable logic circuits

Abstract: This paper presents a 2-to-2 interconnect switch based on Conductive Bridging Random Access Memories (CBRAMs), which can be used to form a switch box in reconfigurable logic circuits like FPGAs. Interconnect switching as well as configuration storage are achieved by the same resistive switching devices. The solution is stable without read disturb and false programming, and brings an area saving of more than two, compared to the current SRAM based circuits. It is a promising breakthrough for including permanent retention mechanisms in embedded systems at low cost.

A Built-In Self-Test Structure (BIST) for Resistive RAMs Characterization: Application to Bipolar OxRRAMs

Abstract: Problem Formulation: Resistive Random Access Memory (ReRAM) is a form of nonvolatile storage that operates by changing the resistance of a specially formulated solid dielectric material [1]. Among ReRAMs, Oxide-based Resistive RAMs (so-called OxRRA M) are promising candidates due their compatibility with CMOS processes and high ON/OFF r esistance ratio. Common problems with OxRRAM are related to high variability in operating conditions and low yield. OxRRAM variability mainly impact ON/OFF resistance ratio. This ratio i s a key parameter to determine the overall performance of an OxRRAM memory. In this context, t he presented built-in structure allows collecting statistical data related to the OxRRAM memory array (ON/OFF resistance distributions) for reliability assessment of the technology.