Superjunction has arguably been the most creative and important concept in the power device field since the introduction of the insulated gate bipolar transistor (IGBT) in the 1980s. It is the only concept known today that has challenged and ultimately proved wrong the well-known theoretical study on the limit of silicon in high-voltage devices. This paper deals with the history, device and process development, and the future prospects of Superjunction technologies. It covers fundamental physics, technological challenges as well as aspects of design and modeling of unipolar devices, such as CoolMOS. The superjunction concept is compared to other methods of enhancing the conductivity of power devices (from bipolar to employment of wide-bandgap materials) to derive its set of benefits and limitations. This paper closes with the application of the superjunction concept to other structures or materials, such as terminations, superjunction IGBTs, or silicon carbide Field Effect Transistors (FETs).

Superjunction Power Devices, History, Development, and Future Prospects

The present disclosure describes a methodology for wireless power transmission based on pocket-forming. This methodology may include one transmitter and at least one or more receivers, being the transmitter the source of energy and the receiver the device that is desired to charge or power. The transmitter may identify and locate the device to which the receiver is connected and thereafter aim pockets of energy to the device in order to power it. Pockets of energy may be generated through constructive and destructive interferences, which may create null-spaces and spots of pockets of energy ranged into one or more radii from transmitter. Such feature may enable wireless power transmission through a selective range, which may limit operation area of electronic devices and/or may avoid formation of pockets of energy near and/or over certain areas, objects and people.

Wireless power transmission with selective range

Configurations and methods of wireless power transmission for charging or powering one or more electronic devices inside a vehicle are disclosed. A transmitter capable of single or multiple pocket-forming may be connected to a car lighter, where this transmitter may include a circuitry module and an antenna array integrated within the transmitter, or operatively connected through a cable. This cable may allow the positioning of the antenna array in different locations inside the vehicle suitable for directing RF waves or pockets of energy towards one or more electronic devices. Transmitter's configuration can be accessed by one or more electronic devices through Bluetooth communication in order to set up charging or powering priorities.

Wireless charging and powering of electronic devices in a vehicle

The present disclosure may provide a wireless power system which may be used to provide wireless power transmission (WPT) while using suitable WPT techniques such as pocket-forming. Wireless power system may be used in a wireless powered house for providing power and charge to a plurality of mobile and non-mobile devices. Wireless powered house may include a single base station which may be connected to several transmitters. Base station may manage operation of every transmitter in an independently manner or may operate them as a single transmitter. Connection between base station and transmitters may be achieved through a plurality of techniques including wired connections and wireless connections.

Wireless powered house

Embodiments directed to providing health safety in a wireless power transmission systems are disclosed herein. One embodiment includes a processing apparatus with a processor; a data storage; and one or more wireless power transmitters each including at least two antennas. The one or more wireless power transmitters receive instructions from the processing apparatus that cause the transmitters to transmit RF waves that constructively interfere to provide wirelessly delivered power to one or more receivers. The processing apparatus receives and processes wireless power proscribing data for each respective receiver, respective wireless power proscribing data including at least one user-specified circumstance that a user inputs as to when a respective electronic device coupled with the respective receiver is in use; and the processing apparatus causes transmission of the RF waves by the transmitters in accordance with determining that the at least one user-specified circumstance is not present at the respective electronic device.

System and method for providing health safety in a wireless power transmission system

A silicon-on-insulator (SOI) lateral diffused metal-oxide semiconductor (LDMOS) with potential modulation plates (PMPs) and deep-oxide trenches (DOTs) is proposed and studied through TCAD simulations, which aims to enhance the electron mobility and improve the ON-resistance ( ${R}_{ \mathrm{\scriptscriptstyle ON}}$ ). The proposed SOI LDMOS consists of a conduction cell and an auxiliary cell. The surface electric potential in the conduction cell can be modulated by PMPs in both the ON-state and the OFF-state. In the ON-state, the gate voltage ( ${V}_{G}$ ) is delivered to the auxiliary cell and can be fully sustained by P-/N-well junction. Then, electrodes ( ${P}1$ – ${P}15$ ) arranged between the adjacent DOTs in the auxiliary cell deliver ${V}_{G}$ back to PMPs, which can effectively induce the electron accumulation on the silicon surface in the conduction cell. The enhanced electron accumulation in turn results in high electron mobility and low ${R}_{ \mathrm{\scriptscriptstyle ON}}$ . In the OFF-state, the electric field and potential are reshaped by DOTs and PMPs, ensuring a high breakdown voltage (BV). In addition, the maximum lattice temperature ( ${T}_{\text {max}}$ ) and temperature rise ( $ {\Delta } {T} = {T}_{\text {max}} -{T}_{\text {in}}$ , ${T}_{\text {in}}$ : initial temperature) can be significantly decreased. Compared with the conventional SOI LDMOS, the proposed SOI LDMOS achieves 43.29% reduction in ${R}_{ \mathrm{\scriptscriptstyle ON}}$ at ${V}_{G} =15$ V without deteriorating BV and 50% decrease in $ {\Delta } {T} $ at ${I}_{\text {DS}} =0.2$ A (42 A/cm $^{{2}}$ ).

Silicon-on-Insulator Lateral DMOS With Potential Modulation Plates and Multiple Deep-Oxide Trenches

In this paper, the on state quasi-saturation effect of high voltage SJ-VDMOS (Superjunction vertical double diffused MOSFET) which is formed using alternate process of boron implantation and n-epitaxial growth for several turns are investigated in detail. Transconductance of the device is studied by simply formula derivation of MOSFET. Velocity saturation in the JFET region is strongly influence the transconductance performance of the device. In order to improve the quasi-saturation and have a flatter transconductance, an improved structure having floating p-pillar is proposed without additional process. Eventually, the above results are confirmed by simulation and measurement.

On state output characteristics and transconductance analysis of high voltage (600V) SJ-VDMOS

The gate voltage overshoot during the turn-on transient in the trench gate U-shaped (TGU) channel silicon-on-insulator lateral insulated gate bipolar transistor (SOI-LIGBT) is investigated and novel structures are proposed for the first time with numerical simulation in this article. The TGU SOI-LIGBT features two U-shaped trench gates, G1 and G2, connected together. The U-shaped trench for G2 serves as a hole barrier trench. A large number of holes accumulate in the U-shaped region during the turn-on transient because of the U-shaped architecture and the hole-blocking effect of G2. The displacement current induced by the nonuniform distributed holes overcharges the gate and leads to high di / dt . In this article, the novel structures (Novel-1 and Novel-2) with G2 partially filled by the polysilicon are proposed for the improvement in gate voltage overshoot while keeping superior turn-on loss ( ${E}_{ \mathrm{ON}}$ ). The novel structures (Novel-1 and Novel-2) can suppress the hole accumulation and slow down the rising of the electric potential in the silicon region near the G2. The di / dt can be lowered and the displacement current that overcharges G2 can be effectively shielded. Compared with the conventional TGU structure, the di / dt of the Novel-2 are improved by 56.3% at the same ${E}_{ \mathrm{ON}}$ of 2.4 mJ/cm2.

Simulation Study of Novel Trench Gate U-Shaped Channel SOI Lateral IGBTs With Suppressed Gate Voltage Overshoot and Reduced di/dt

In this letter, we first incorporate the concept of index modulation (IM) into simultaneously transmitting and reflecting reconfigurable intelligent surface (STAR-RIS) aided non-orthogonal multiple access (NOMA) system to improve the spectral efficiency. Specifically, the proposed IM aided STAR-RIS-NOMA system enables extra information bits to be transmitted by allocating subsurfaces to different users in a pre-defined subsurface allocation pattern. Furthermore, an approximate closed form expression on bit error rate (BER) is derived. Simulation results demonstrate that the proposed IM aided STAR-RIS-NOMA system is able to acquire transmission rate improvement compared to the conventional STAR-RIS NOMA.

Index Modulation for STAR-RIS Assisted NOMA System

In this paper, a novel 85V trench power MOSFET featuring a NPN Sandwich Split-Gate (SSG) for reducing the switching loss is proposed and investigated. By using the SSG structure, two junction capacitances are introduced in series with the CDS (drain-to-source capacitance). As a result, the output capacitance (Coss) is reduced dramatically and then the switching loss is improved. The results illustrated that, with a 92V blocking voltage, the SSG Trench (SSGT) power MOSFET achieves Coss of 8.5nF when drain voltage is OV, while the energy stored in output capacitance (Eoss) at 50V is 4.1μJ Compared to conventional SGT power MOSFET, Eoss is improved by approximately 54% while maintaining the same on-state resistance.

Jing Zhu

Papers

Silicon-on-Insulator Lateral DMOS With Potential Modulation Plates and Multiple Deep-Oxide Trenches

On state output characteristics and transconductance analysis of high voltage (600V) SJ-VDMOS

Simulation Study of Novel Trench Gate U-Shaped Channel SOI Lateral IGBTs With Suppressed Gate Voltage Overshoot and Reduced di/dt

Index Modulation for STAR-RIS Assisted NOMA System

A novel split-gate structure for 85V application with low output capacitance