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John Augustine

Researcher at Indian Institute of Technology Madras

Publications -  90
Citations -  1127

John Augustine is an academic researcher from Indian Institute of Technology Madras. The author has contributed to research in topics: Distributed algorithm & Dynamic network analysis. The author has an hindex of 17, co-authored 81 publications receiving 955 citations. Previous affiliations of John Augustine include Nanyang Technological University & University of California, Irvine.

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Proceedings ArticleDOI

Storage and search in dynamic peer-to-peer networks

TL;DR: These algorithms are the first-known, fully-distributed storage and search algorithms that provably work under highly dynamic settings (i.e., high churn rates per step) and scalable and do not require any global topological knowledge.
Book ChapterDOI

Fast Byzantine Leader Election in Dynamic Networks

TL;DR: This work studies the fundamental Byzantine leader election problem in dynamic networks where the topology can change from round to round and nodes can also experience heavy churn, and proposes a scalable solution that is scalable, fully-distributed, lightweight, and simple to implement.
Proceedings ArticleDOI

Dispersion of Mobile Robots: A Study of Memory-Time Trade-offs

TL;DR: In this article, the authors studied the problem of minimizing the memory required by each robot and minimizing the number of rounds required to achieve dispersion in the case of mobile robots, where each robot is placed in an n node graph and must coordinate with each other to reach a final configuration such that exactly one robot is at each node.
Journal ArticleDOI

Minimax regret 1-sink location problem in dynamic path networks

TL;DR: An O ( n log ? n ) time algorithm for the minimax regret 1-sink location problem in dynamic path networks with uniform capacity, where n is the number of vertices in the network.
Proceedings ArticleDOI

Opportunities for energy efficient computing: a study of inexact general purpose processors for high-performance and big-data applications

TL;DR: It is demonstrated that disproportionate gains are possible through a simple devise for injecting inexactness or approximation into the hardware architecture of a computing system with a general purpose template including a complete memory hierarchy, and energy savings possible through this approach in the context of large and challenging applications are demonstrated.