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Joseph Paul Jayachandran

Researcher at Georgia Institute of Technology

Publications -  11
Citations -  215

Joseph Paul Jayachandran is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Supercritical fluid & Thermal decomposition. The author has an hindex of 7, co-authored 11 publications receiving 215 citations. Previous affiliations of Joseph Paul Jayachandran include Georgia Tech Research Institute.

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Journal ArticleDOI

Air-channel fabrication for microelectromechanical systems via sacrificial photosensitive polycarbonates

TL;DR: In this paper, a degradation mechanism was proposed based on FT-IR, mass spectrometry, and thermogravimetric analysis (TGA), and the decomposition of polycarbonates with the aid of in situ generated photo-acid has been demonstrated and applied to the fabrication of micro air-channels.
Patent

Sacrificial Compositions And Methods Of Fabricating A Structure Using Sacrificial Compositions

TL;DR: In this paper, a polymer and a catalytic amount of a negative tone photoinitiator are combined with negative tone photos to create negative tones in the negative tone image of a photo.
Patent

Sacrificial compositions, methods of use thereof, and methods of decomposition thereof

TL;DR: In this article, a composition having a sacrificial polymer and a pthotoacid generator is described, and methods of use of such polymers, methods of decomposition, and decomposition thereof are discussed.
Journal ArticleDOI

Hydrophobic/hydrophilic surface modification within buried air channels

TL;DR: In this paper, the surface characteristics of the silica surface after the decomposition of Unity 2203P was explored, and it was found that the surface inside the air-channel after low-temperature Unity2203P decomposition was hydrophilic and was then converted to hydrophobic after higher-time temperature treatment, which has applications for electrical/optical interconnects, microelectromechanical systems, microfluidics, and microreactors.
Journal ArticleDOI

Chip-to-Module Interconnections Using "Sea of Leads" Technology

TL;DR: In this paper, the authors propose a novel, ultra-high-density, compliant, wafer-level, input/output interconnection technology called "sea of leads" as a key enabling technology for future high-performance microsystems.