Recent changes in how people consume multimedia services are causing an explosive increase in mobile traffic. With more and more people using wireless networks, the demand for the ultra-fast wireless communications systems is increasing. To date, this demand has been accommodated with advanced modulation schemes and signal-processing technologies at microwave frequencies. However, without increasing the carrier frequencies for more spectral resources, it may be quite difficult to keep up with the needs of users. Although there are several alternative bands, recent advances in terahertz-wave (THz-wave) technologies have attracted attention due to the huge bandwidth of THz waves and its potential for use in wireless communications. The frequency band of 275 ~ 3000 GHz , which has not been allocated for specific uses yet, is especially of interest for future wireless systems with data rates of 10 Gb/s or higher. Although THz communications is still in a very early stage of development, there have been lots of reports that show its potential. In this review, we will examine the current progress of THz-wave technologies related to communications applications and discuss some issues that need to be considered for the future of THz communications.

Present and Future of Terahertz Communications

Science and technologies based on terahertz frequency electromagnetic radiation (100 GHz–30 THz) have developed rapidly over the last 30 years. For most of the 20th Century, terahertz radiation, then referred to as sub-millimeter wave or far-infrared radiation, was mainly utilized by astronomers and some spectroscopists. Following the development of laser based terahertz time-domain spectroscopy in the 1980s and 1990s the field of THz science and technology expanded rapidly, to the extent that it now touches many areas from fundamental science to 'real world' applications. For example THz radiation is being used to optimize materials for new solar cells, and may also be a key technology for the next generation of airport security scanners. While the field was emerging it was possible to keep track of all new developments, however now the field has grown so much that it is increasingly difficult to follow the diverse range of new discoveries and applications that are appearing. At this point in time, when the field of THz science and technology is moving from an emerging to a more established and interdisciplinary field, it is apt to present a roadmap to help identify the breadth and future directions of the field. The aim of this roadmap is to present a snapshot of the present state of THz science and technology in 2017, and provide an opinion on the challenges and opportunities that the future holds. To be able to achieve this aim, we have invited a group of international experts to write 18 sections that cover most of the key areas of THz science and technology. We hope that The 2017 Roadmap on THz science and technology will prove to be a useful resource by providing a wide ranging introduction to the capabilities of THz radiation for those outside or just entering the field as well as providing perspective and breadth for those who are well established. We also feel that this review should serve as a useful guide for government and funding agencies.

https://iopscience.iop.org/article/10.1088/1361-6463/50/4/043001/pdf

The 2017 terahertz science and technology roadmap

The 2016 terahertz science and technology roadmap

This paper reviews and analyzes four reported low-noise amplifier (LNA) design techniques applied to the cascode topology based on CMOS technology: classical noise matching, simultaneous noise and input matching (SNIM), power-constrained noise optimization, and power-constrained simultaneous noise and input matching (PCSNIM) techniques. Very simple and insightful sets of noise parameter expressions are newly introduced for the SNIM and PCSNIM techniques. Based on the noise parameter equations, this paper provides clear understanding of the design principles, fundamental limitations, and advantages of the four reported LNA design techniques so that the designers can get the overall LNA design perspective. As a demonstration for the proposed design principle of the PCSNIM technique, a very low-power folded-cascode LNA is implemented based on 0.25-/spl mu/m CMOS technology for 900-MHz Zigbee applications. Measurement results show the noise figure of 1.35 dB, power gain of 12 dB, and input third-order intermodulation product of -4dBm while dissipating 1.6 mA from a 1.25-V supply (0.7 mA for the input NMOS transistor only). The overall behavior of the implemented LNA shows good agreement with theoretical predictions.

/pdf/cmos-low-noise-amplifier-design-optimization-techniques-42bhmxri1r.pdf

CMOS low-noise amplifier design optimization techniques

The field of terahertz integrated technology has undergone significant development in the past ten years. This has included work on different substrate technologies such as III–V semiconductors and silicon, work on field-effect transistor devices and heterojunction bipolar devices, and work on both fully electronic and hybrid electronic–photonic systems. While approaches in electronic and photonics can often seem distinct, techniques have blended in the terahertz frequency range and many emerging systems can be classified as photonics-inspired or hybrid. Here, we review the development of terahertz integrated electronic and hybrid electronic–photonic systems, examining, in particular, advances that deliver important functionalities for applications in communication, sensing and imaging. Many of the advances in integrated systems have emerged, not from improvements in single devices, but rather from new architectures that are multifunctional and reconfigurable and break the trade-offs of classical approaches to electronic system design. We thus focus on these approaches to capture the diversity of techniques and methodologies in the field. This Review Article examines the development of terahertz integrated electronic and hybrid electronic–photonic systems, considering, in particular, advances that deliver important functionalities for applications in communication, sensing and imaging.

Terahertz integrated electronic and hybrid electronic–photonic systems

Schottky-barrier diodes (SBD's) fabricated in CMOS without process modification are shown to be suitable for active THz imaging applications Using a compact passive-pixel array architecture, a fully-integrated 280-GHz 4 × 4 imager is demonstrated At 1-MHz input modulation frequency, the measured peak responsivity is 51 kV/W with ±20% variation among the pixels The measured minimum NEP is 29 pW/Hz1/2 Additionally, an 860-GHz SBD detector is implemented by reducing the number of unit cells in the diode, and by exploiting the efficiency improvement of patch antenna with frequency The measured NEP is 42 pW/Hz1/2 at 1-MHz modulation frequency This is competitive to the best reported performance of MOSFET-based pixel measured without attaching an external silicon lens (66 pW/Hz1/2 at 1 THz and 40 pW/Hz1/2 at 650 GHz) Given that incorporating the 280-GHz detector into an array increased the NEP by ~ 20%, the 860-GHz imager array should also have the similar NEP as that for an individual detector The circuits were utilized in a setup that requires neither mirrors nor lenses to form THz images These suggest that an affordable and portable fully-integrated CMOS THz imager is possible

/pdf/active-terahertz-imaging-using-schottky-diodes-in-cmos-array-1lipxoxjoj.pdf

Active Terahertz Imaging Using Schottky Diodes in CMOS: Array and 860-GHz Pixel

Key components of systems operating at high millimeter wave and sub-millimeter wave/terahertz frequencies, a 140-GHz fundamental mode voltage controlled oscillator (VCO) in 90-nm CMOS, a 410-GHz push-push VCO with an on-chip patch antenna in 45-nm CMOS, and a 125-GHz Schottky diode frequency doubler, a 50-GHz phase-locked loop with a frequency doubled output at 100 GHz, a 180-GHz Schottky diode detector and a 700-GHz plasma wave detector in 130-nm CMOS are demonstrated. Based on these, and the performance trends of nMOS transistors and Schottky diodes fabricated in CMOS, paths to terahertz CMOS circuits and systems including key challenges that must be addressed are suggested. The terahertz CMOS is a new opportunity for the silicon integrated circuits community.

Progress and Challenges Towards Terahertz CMOS Integrated Circuits

A switched resonator concept which allows better trade-off between phase noise and power consumption is demonstrated using a dual band VCO. The dual-band VCO operates near 900 MHz and 1.8 GHz with phase noise of -125 and 123 dBc/Hz at a 600-KHz offset and 16-mW power consumption. Compared to a single band 1.8 GHz VCO, the dual-band VCO has almost the same phase noise and power consumption.

Demonstration of a switched resonator concept in a dual-band monolithic CMOS LC-tuned VCO

Two 5.35-GHz monolithic voltage-controlled oscillators (VCOs) and two prescalers have been fabricated in a digital 0.25-/spl mu/m CMOS process. One VCO uses p/sup +//n-well diodes, while the other uses MOS varactors, Q of 57 at 5.5 GHz and 0 V bias (low-Q condition) for a p/sup +//n-well varactor has been achieved. For an MOS varactor, it is possible to achieve a quality factor of 140 at 5.5 GHz. The tuning ranges of the VCOs are >310 MHz, and their phase noise is <-116.5 dBc/Hz at a 1-MHz offset while consuming /spl sim/7 mW power at V/sub DD/=1.5 V. The low phase noise is achieved by using only PMOS transistors in the VCO core and by optimizing the resonator layout. The prescalers utilize a variation of the source-coupled logic. The power consumption is 4.1 mW at 1.5-V V/sub DD/ and 5.4 GHz. By widening the transistors in the first three divide-by-two stages, the maximum operating frequency is increased to 9.96 GHz at V/sub DD/=2.5 V.

Fully integrated 5.35-GHz CMOS VCOs and prescalers

A 1.5-V 256-263 8-modulus prescaler and a 1.5-V integer-N phase-locked loop (PLL) with eight different output frequencies have been implemented in a 0.13-mum foundry CMOS process. The synchronous divide-by-4/5 circuit uses current mode logic (CML) D-flip-flops with resistive loads to achieve 21-GHz maximum operating frequency at input power of 0 dBm. The divider is used to implement an 8-modulus prescaler consuming 6-mA current and 9-mW power. This extremely low power consumption is achieved by radically decreasing the sizes of transistors in the divider. Utilizing the prescaler, a charge-pump integer-N PLL has been demonstrated with 20-GHz output frequency. The in-band phase noise of the PLL at 60-kHz offset and out-of-band phase noise at 10-MHz offset are ~-80 dBc/Hz and -116.1 dBc/Hz, respectively. The locking range is from 20.05 to 21 GHz. The PLL consumes 15-mA current and 22.5-mW power from a 1.5-V power supply.

K. O. Kenneth

Papers

Active Terahertz Imaging Using Schottky Diodes in CMOS: Array and 860-GHz Pixel

Progress and Challenges Towards Terahertz CMOS Integrated Circuits

Demonstration of a switched resonator concept in a dual-band monolithic CMOS LC-tuned VCO

Fully integrated 5.35-GHz CMOS VCOs and prescalers

A 21-GHz 8-Modulus Prescaler and a 20-GHz Phase-Locked Loop Fabricated in 130-nm CMOS