L
Larry Wissel
Researcher at IBM
Publications - 20
Citations - 248
Larry Wissel is an academic researcher from IBM. The author has contributed to research in topics: Clock signal & Redundancy (engineering). The author has an hindex of 8, co-authored 20 publications receiving 248 citations.
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Patent
Physically Unclonable Function Implemented Through Threshold Voltage Comparison
TL;DR: In this paper, an electronic device is designed to generate a response to a challenge, with each of the transistors having a threshold voltage substantially equal to an intended threshold voltage, and the output voltage of each pair of transistors varies based on the threshold voltages of each transistors.
Patent
Single pin performance screen ring oscillator with frequency division
TL;DR: In this article, a single I/O node is used for coupling to the oscillator circuit, and for activating and monitoring its oscillating output signal, which can be accessed at the wafer level, after packaging, or in the field.
Patent
Latch clustering for power optimization
Paul Henry Bergeron,Keith M. Carrig,Alvar A. Dean,Roger P. Gregor,David J. Hathaway,David E. Lackey,Harold E. Reindel,Larry Wissel +7 more
TL;DR: In this paper, a method and structure of clock optimization is presented, which includes creating an initial placement of clock feeding circuits according to clock signal requirements, identifying clusters of the clock feeding circuit, wherein each cluster includes a distinct clock signal supply device to which each clock feeder within the cluster is connected.
Patent
Method of integrated circuit design by selection of noise tolerant gates
John M. Cohn,Scott Whitney Gould,Peter A. Habitz,Jose L. Neves,William F. Smith,Larry Wissel,Paul S. Zuchowski +6 more
TL;DR: In this paper, a method of integrated circuit design using the selective replacement of increasingly noise tolerant cells is disclosed, which involves compiling a library comprising a plurality of design element cells, sorting the library into groups of functionally-equivalent cells, and ordering the cells in each group from one extreme to the other extreme value of a featured parameter for which the integrated circuit is to be tested.
Patent
Radiation tolerant flip-flop
TL;DR: In this paper, a flip-flop circuit consisting of a master latch circuit, a slave latch circuit coupled to the master circuit, and a correction circuit for increasing an amount of charge that can be absorbed by the master loop in response to a soft-error event when the slave circuit is in a transparent phase and when both the master and slave circuits are storing the same data.