scispace - formally typeset
M

Maryam Shojaei Baghini

Researcher at Indian Institute of Technology Bombay

Publications -  298
Citations -  3112

Maryam Shojaei Baghini is an academic researcher from Indian Institute of Technology Bombay. The author has contributed to research in topics: CMOS & Voltage. The author has an hindex of 22, co-authored 269 publications receiving 2235 citations. Previous affiliations of Maryam Shojaei Baghini include Indian Institutes of Technology & Intel Mobile Communications.

Papers
More filters
Journal ArticleDOI

A critical review of soil moisture measurement

TL;DR: A critical review of all the established and emerging soil moisture measurement techniques with respect to their merits and demerits is presented in this article, where the authors highlight the importance of various innovations based on Micro Electro Mechanical Systems (MEMS) and nano-sensors emerging in this context.
Journal ArticleDOI

Broadband Bent Triangular Omnidirectional Antenna for RF Energy Harvesting

TL;DR: In this article, a broadband bent triangular omnidirectional antenna is presented for RF energy harvesting, which has a bandwidth for VSWR from 850 MHz to 1.94 GHz, and a peak efficiency of 60% and 17% is obtained for a load of $500~Omega $ at 980 and 1800 MHz, respectively.
Journal ArticleDOI

Differential Microstrip Antenna for RF Energy Harvesting

TL;DR: In this paper, a differential microstrip antenna with improved gain for RF energy harvesting is presented, which can be used in either center grounded or differential configuration for GSM900 band (890-960 MHz).
Proceedings ArticleDOI

RF energy harvesting system from cell towers in 900MHz band

TL;DR: In this paper, an experimental RF energy harvesting system to harvest energy from cell towers is presented, where an electromagnetically-coupled square microstrip antenna is designed and fabricated for deployment in the presented system.
Proceedings ArticleDOI

Sub-20 nm gate length FinFET design: Can high-κ spacers make a difference?

TL;DR: In this paper, a novel device design methodology for undoped underlapped FinFETs with high-kappa spacers is presented to achieve higher circuit speed and SRAM cells with higher stability, lower leakage, faster access times and higher robustness to process variations compared to overlapped finFET.