An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

Method for Manufacturing Semiconductor Device

A semiconductor projection is formed on a semiconductor substrate of the first conductivity type and has a semiconductor layer of the first conductivity type. The semiconductor projection has a top surface and side surfaces. A gate electrode is formed above at least the side surfaces of the semiconductor projection. Source and drain regions are formed in the side surfaces of the semiconductor projection on opposite sides of the gate electrode. First and second device isolation insulating films are formed on the semiconductor substrate on opposite sides of the semiconductor projection. A first impurity region is formed in the semiconductor substrate below the first device isolation insulating film. A second impurity region is formed in the semiconductor substrate below the second device isolation insulating film. The first and second impurity regions are in contact with each other in the semiconductor substrate below the semiconductor projection.

Semiconductor device having MIS field effect transistors or three-dimensional structure

DRAM is facing severe scalability challenges in sub-45nm tech- nology nodes due to precise charge placement and sensing hur- dles in deep-submicron geometries. Resistive memories, such as phase-change memory (PCM), already scale well beyond DRAM and are a promising DRAM replacement. Unfortunately, PCM is write-limited, and current approaches to managing writes must de- commission pages of PCM when the first bit fails. This paper presents dynamically replicated memory (DRM), the first hardware and operating system interface designed for PCM that allows continued operation through graceful degradation when hard faults occur. DRM reuses memory pages that con- tain hard faults by dynamically forming pairs of complementary pages that act as a single page of storage. No changes are required to the processor cores, the cache hierarchy, or the operating sys- tem's page tables. By changing the memory controller, the TLBs, and the operating system to be DRM-aware, we can improve the lifetime of PCM by up to 40x over conventional error-detection techniques.

/pdf/dynamically-replicated-memory-building-reliable-systems-from-202kz1lxrd.pdf

Dynamically replicated memory: building reliable systems from nanoscale resistive memories

PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of enhancing a SNM (Static Noise Margin), thereby being made to be advantageous for a stable operation. SOLUTION: The semiconductor memory device is equipped with: a SRAM (Static Random Access Memory) cell 10 provided with first and second driving transistors N3, N4 which constitute a pair of inverters; and a circuit 11 for applying a voltage lower or higher than a grounding voltage to one end of current routes of the first and second driving transistors. COPYRIGHT: (C)2008,JPO&INPIT

Semiconductor memory device

PROBLEM TO BE SOLVED: To improve the flatness of an insulation film polished by a CMP method. SOLUTION: Wirings 10 are formed on the top layer of a layer insulation film 9 covering MISFETs Q1 formed on the main surface of a semiconductor substrate 1 wire dummy wirings 11 disposed at regions, where the spacings of the wirings 10 are large. The dummy wirings 11 are also formed at scribe regions but not formed at peripheral regions of bonding pads and peripheral regions of markers. Dummy gate wirings are provided at the same layer as gate electrodes MISFETs, and dummy regions are directed to shallow-trench element separation regions. After forming these dummy members, the insulation film is planarized by a CMP method.

Semiconductor integrated circuit device, and manufacture and design thereof

PURPOSE: To obtain a semiconductor device having a thin film transistor(TFT) wherein integration density is high and electric characteristics are superior, by arranging a channel, at least a part of said channel, in a semiconductor layer almost vertical to a semiconductor layer, and making the direction of a current flowing in the channel nearly parallel with the substrate. CONSTITUTION: A gate electrode 30 sandwiches a gate insulating film 91, and surrounds a thin film semiconductor layer; a thin film part which is not covered with a gate 30 is a source electrode 40 and a drain electrode 50; the thin film semiconductor layer which is sandwiched by the gate 30 between the electrodes 40, 50 constitutes a channel in the direction parallel with the surface of a substrate 10. Since the channel is surrounded by an insulating layer 20 and the gate insulating film 91, the channel is electrically isolated from the substrate 10. The gate electrode 30 exerts field effect on the channel via a gate insulating film 91, and performs three-terminal field effect type transistor actions by a source electrode 40 and a drain electrode 50. Hence excellent electric characteristics can be obtained by the gate, and a finely miniaturized FET can be constituted in a plane view. COPYRIGHT: (C)1990,JPO&Japio

Semiconductor device and semiconductor storage device

PROBLEM TO BE SOLVED: To provide a phase change memory capable of applying a reset current to phase change film for making it amorphous without the need for making the whole device larger and the need for a complicated manufacturing process. SOLUTION: The phase change memory 80 includes a phase change film 16, lower plugs 12, 13 and an insulating film 15 between the phase change film 16 and lower plugs 12, 13. At a portion where the phase change film 16 connects with lower plugs 12, 13, lower plugs 12, 13 include a first region and a second region. The thickness of the insulating film 15 on lower plugs 12, 13 in the first region is zero or thinner than that of the insulating film 15 on lower plugs 12, 13 in the second region, thereby the current can be concentrated at lower plugs in the first region. In other words, the current density increases. Due to the current density rise, the phase change film 16 can be amorphous even if the value of reset current is lowered. COPYRIGHT: (C)2009,JPO&INPIT

Phase change memory

PURPOSE: To obtain a vertical memory cell to be miniaturized for use in a gigabit class ultrahigh integrated DRAM by electrically insulation-isolating a hollow cylindrical single crystalline region to become an active region from a substrate body by digging the substrate up to an insulating film formed previously in the substrate, and deciding the thickness in a self-alignment manner. CONSTITUTION: Each memory cell is covered with an oxide film 9. A channel region 22 in which an impurity region or more particularly a diffused layer is not disposed at a substrate side is formed of a single crystal in such a manner that channel diffused regions 23, 24, bit lines 20, 28 are connected to the electrodes 15 of capacitors in a self-alignment manner, and a word line electrode 30 is further connected to a gate electrode 26 in a self-alignment manner. The diameter of a trench is increased in the substrate, the inner wall is covered with an oxide film, the substrate is then dug to the oxide film to form a hollow cylindrical silicon single crystalline substrate, and the channel is further connected to one electrode of a capacitor formed in the extended trench in a self- alignment. Then, both the channel region and the capacitor region are covered with the oxide film to realize a vertical memory cell. COPYRIGHT: (C)1992,JPO&Japio

Semiconductor memory and manufacture thereof

PURPOSE:To form a semiconductor crystal thin film in a desired area of amorphous insulation film, which is electrically active with less crystal defects, without preparing for a seeded area. CONSTITUTION:An amorphous Si film 3 is provided on an SiO2 film 2 of an Si water 1, and with a resist film 5 working as a mask, P ions 6 selectively introduced as an electrically active impurities on the desired area of amorphous Si film 3, for forming a P implantation area 7. Thermal treatment is performed to crystalize at least that desired area. Selective introduction of electrically inactive impurities, such as 0, leads to the crystalization of the area other than one for the implantation.

Masahiro Shigeniwa

Papers

Semiconductor integrated circuit device, and manufacture and design thereof

Semiconductor device and semiconductor storage device

Phase change memory

Semiconductor memory and manufacture thereof

Formation of semiconductor crystal film and semiconductor device