A system and method for distributing information for storage media, and in particular, for distributing updated navigation data, such as geographical data and navigation application programs, contained on storage media and used in in-vehicle navigation systems. A plurality of local repositories are located in a geographical area. Each of the local repositories includes updated versions of navigation data for the navigation systems. Owners of vehicles having navigation systems may visit any of the repositories from time to time where they can obtain updated versions of the navigation data for their navigation systems. Subscriptions for obtaining updated navigation data would be available to the owners of navigation systems that would entitle them to obtain updated navigation data from the repositories. Procedures for updating the local repositories are also provided. The system and method can be used for updating other types of software.

System and method for distributing information for storage media

A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.

Distortion estimation and cancellation in memory devices

A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted.

Adaptive power control

Side-channel attacks on mobile devices have gained increasing attention since their introduction in 2007. While traditional side-channel attacks, such as power analysis attacks and electromagnetic analysis attacks, required physical presence of the attacker as well as expensive equipment, an (unprivileged) application is all it takes to exploit the leaking information on modern mobile devices. Given the vast amount of sensitive information that are stored on smartphones, the ramifications of side-channel attacks affect both the security and privacy of users and their devices. 
In this paper, we propose a new categorization system for side-channel attacks, which is necessary as side-channel attacks have evolved significantly since their scientific investigations during the smart card era in the 1990s. Our proposed classification system allows to analyze side-channel attacks systematically, and facilitates the development of novel countermeasures. Besides this new categorization system, the extensive survey of existing attacks and attack strategies provides valuable insights into the evolving field of side-channel attacks, especially when focusing on mobile devices. We conclude by discussing open issues and challenges in this context and outline possible future research directions.

Systematic Classification of Side-Channel Attacks: A Case Study for Mobile Devices

Since the first publication of a successful practical two-fault attack on protected CRT-RSA surprisingly little attention was given by the research community to an ensuing new challenge. The reason for it seems to be two-fold. One is that generic higher order fault attacks are very difficult to model and thus finding robust countermeasures is also difficult. Another reason may be that the published experiment was carried out on an outdated 8 bit microcontroller and thus was not perceived as a serious threat to create a sense of urgency in addressing this new menace. In this paper we describe two-fault attacks on protected CRT-RSA implementations running on an advanced 32 bit ARM Cortex M3 core. To our knowledge, this is the first practical result of two fault laser attacks on a protected cryptographic application. Considering that laser attacks are much more accurate in targeting a particular variable, the significance of our result cannot be overlooked.

Multi Fault Laser Attacks on Protected CRT-RSA

This paper introduces a low cost near-field mapping system. This system scans automatically and dynamically, in the time domain, the magnetic field emitted by integrated circuits during the execution of a repetitive set of instructions. Application of this measurement system is given to an industrial chip designed with a 180nm CMOS process. This application demonstrates the efficiency of the system but also the helpfulness of the results obtained to identify paths followed by the current, enabling to locate the potential IR drop zones.

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Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits

The disclosure relates to detectors of the level of supply voltage in an integrated circuit. The disclosed detector is designed to detect the crossing of low levels of supply voltage. It comprises a first arm to define a first reference voltage and a second arm to define a second reference voltage, these two reference voltages varying differently as a function of the supply voltage and their curves of variation intersecting for a value of the supply voltage located close to a desired threshold. A comparator receives the two reference voltages. The first arm has a resistive divider bridge, an intermediate connector of which constitutes the first reference voltage. The second arm comprises a resistor series-connected with a native P type MOS transistor, the point of junction of this resistor and this transistor constituting the second reference voltage. A non-linear element may be parallel-connected to the resistor which constitutes the first reference voltage.

Detector of range of supply voltage in an integrated circuit

A voltage booster circuit including an input for receiving a supply voltage, a plurality of stages for producing an output voltage from the supply voltage by the transfer of charges between at least two of the plurality of stages, and circuit for coupling and decoupling stages to vary the number of stages operatively connected together. A method for producing an output voltage from a supply voltage by using a voltage booster circuit, the circuit includes an input for receiving the supply voltage, a plurality of stages, and a selection switch for the selective isolation of the stages or for the selective connection of the stage. The method includes the following steps: starting the circuit; comparing the value of the output voltage with a decrementation threshold; and decreasing the number of stages which are connected if the decrementation threshold is reached by the value of the output voltage.

Voltage booster circuit with controlled number of stages

This paper presents measurements of pulsed photoelectrical laser stimulation of an NMOS transistor in 90nm technology. The laser power was able to trig the NPN parasitic bipolar Drain/Psubstrate/Source. An electrical model is proposed in order to simulate effects induced by the laser. Results extracted from the electrical simulator are compared to measurements.

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Mathieu Lisart

Papers

Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits

Detector of range of supply voltage in an integrated circuit

Voltage booster circuit with controlled number of stages

Building the electrical model of the pulsed photoelectric laser stimulation of an NMOS transistor in 90nm technology

Electrical modeling of the effect of beam profile for pulsed laser fault injection