We present the science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems, targeting an evolution in technology, that might lead to impacts and benefits reaching into most areas of society. This roadmap was developed within the framework of the European Graphene Flagship and outlines the main targets and research areas as best understood at the start of this ambitious project. We provide an overview of the key aspects of graphene and related materials (GRMs), ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries. We also define an extensive list of acronyms in an effort to standardize the nomenclature in this emerging field.

/pdf/science-and-technology-roadmap-for-graphene-related-two-4q9m7czlkc.pdf

Science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems

International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

The isolation of graphene has triggered an avalanche of studies into the spin-dependent physical properties of this material, as well as graphene-based spintronic devices Here we review the experimental and theoretical state-of-art concerning spin injection and transport, defect-induced magnetic moments, spin-orbit coupling and spin relaxation in graphene Future research in graphene spintronics will need to address the development of applications such as spin transistors and spin logic devices, as well as exotic physical properties including topological states and proximity-induced phenomena in graphene and other 2D materials

Graphene Spintronics

With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor-level techniques that can regulate operating temperature when the package's capacity is exceeded. Evaluating such techniques, however, requires a thermal model that is practical for architectural studies.This paper describes HotSpot, an accurate yet fast model based on an equivalent circuit of thermal resistances and capacitances that correspond to microarchitecture blocks and essential aspects of the thermal package. Validation was performed using finite-element simulation. The paper also introduces several effective methods for dynamic thermal management (DTM): "temperature-tracking" frequency scaling, localized toggling, and migrating computation to spare hardware units. Modeling temperature at the microarchitecture level also shows that power metrics are poor predictors of temperature, and that sensor imprecision has a substantial impact on the performance of DTM.

Temperature-aware microarchitecture

The magnetization of a magnetic material can be reversed by using electric currents that transport spin angular momentum. In the reciprocal process a changing magnetization orientation produces currents that transport spin angular momentum. Understanding how these processes occur reveals the intricate connection between magnetization and spin transport, and can transform technologies that generate, store or process information via the magnetization direction. Here we explain how currents can generate torques that affect the magnetic orientation and the reciprocal effect in a wide variety of magnetic materials and structures. We also discuss recent state-of-the-art demonstrations of current-induced torque devices that show great promise for enhancing the functionality of semiconductor devices.

https://physics.nyu.edu/kentlab/Papers/2012/NatureMaterials_11_372_2012.pdf

Current-induced torques in magnetic materials

This paper presents checkpointed early resource recycling (Cherry), a hybrid mode of execution based on ROB and checkpointing that decouples resource recycling and instruction retirement. Resources are recycled early, resulting in a more efficient utilization. Cherry relies on state checkpointing and rollback to service exceptions for instructions whose resources have been recycled. Cherry leverages the ROB to (1) not require in-order execution as a fallback mechanism, (2) allow memory replay traps and branch mispredictions without rolling back to the Cherry checkpoint, and (3) quickly fall back to conventional out-of-order execution without rolling back to the checkpoint or flushing the pipeline. We present a Cherry implementation with early recycling at three different points of the execution engine: the load queue, the store queue, and the register file. We report average speedups of 1.06 and 1.26 in SPECint and SPECfp applications, respectively, relative to an aggressive conventional architecture. We also describe how Cherry and speculative multithreading can be combined and complement each other.

/pdf/cherry-checkpointed-early-resource-recycling-in-out-of-order-12aib3lffp.pdf

Cherry: Checkpointed early resource recycling in out-of-order microprocessors

Although adaptive processors can exploit application variability to improve performance or save energy, effectively managing their adaptivity is challenging. To address this problem, we introduce a new approach to adaptivity: the Positional approach. In this approach, both the testing of configurations and the application of the chosen configurations are associated with particular code sections. This is in contrast to the currently-used Temporal approach to adaptation, where both the testing and application of configurations are tied to successive intervals in time.We propose to use subroutines as the granularity of code sections in positional adaptation. Moreover, we design three implementations of subroutine-based positional adaptation that target energy reduction in three different workload environments: embedded or specialized server, general purpose, and highly dynamic. All three implementations of positional adaptation are much more effective than temporal schemes. On average, they boost the energy savings of applications by 50% and 84% over temporal schemes in two experiments.

Positional adaptation of processors: application to energy reduction

By using adaptive processing to dynamically tune major microprocessor resources, developers can achieve greater energy efficiency with reasonable hardware and software overhead while avoiding undue performance loss. Adaptive processors require few additional transistors. Further, because adaptation occurs only in response to infrequent trigger events, the decision logic can be placed into a low-leakage state until such events occur.

/pdf/dynamically-tuning-processor-resources-with-adaptive-b8a3fsba6s.pdf

Dynamically tuning processor resources with adaptive processing

Much research has been devoted to making microprocessors energy-efficient. However, little attention has been paid to multiprocessor environments where, due to the cooperative nature of the computation, the most energy-efficient execution in each processor may not translate into the most energy-efficient overall execution. We present the thrifty barrier, a hardware-software approach to saving energy in parallel applications that exhibit barrier synchronization imbalance. Threads that arrive early to a thrifty barrier pick among existing low-power processor sleep states based on predicted barrier stall time and other factors. We leverage the coherence protocol and propose small hardware extensions to achieve timely wake-up of these dormant threads, maximizing energy savings while minimizing the impact on performance.

/pdf/the-thrifty-barrier-energy-aware-synchronization-in-shared-hurs4k5l1r.pdf

The thrifty barrier: energy-aware synchronization in shared-memory multiprocessors

While technology is delivering increasingly sophisticated and powerful chip designs, it is also imposing alarmingly high energy requirements on the chips. One way to address this problem is to manage the energy dynamically. Unfortunately, current dynamic schemes for energy management are relatively limited. In addition, they manage energy either for energy efficiency or for temperature control, but not for both simultaneously. In this paper, we design and evaluate for the first time an energy-management framework that tackles both energy efficiency and temperature control in a unified manner. We call this general approach Dynamic Energy Efficiency and Temperature Management (DEETM). Our framework combines many energy-management techniques and can activate them individually or in groups in a fine-grained manner according to a given policy. The goal of the framework is two-fold: maximize energy savings without extending application execution time beyond a given tolerable limit, and guarantee that the temperature remains below a given limit while minimizing any resulting slowdown. The framework successfully meets these goals. For example, it delivers a 40% energy reduction with only a 10% application slowdown.

/pdf/a-framework-for-dynamic-energy-efficiency-and-temperature-199zq98vqh.pdf

Michael C. Huang

Papers

Cherry: Checkpointed early resource recycling in out-of-order microprocessors

Positional adaptation of processors: application to energy reduction

Dynamically tuning processor resources with adaptive processing

The thrifty barrier: energy-aware synchronization in shared-memory multiprocessors

A framework for dynamic energy efficiency and temperature management