The fifth generation (5G) wireless communication networks are being deployed worldwide from 2020 and more capabilities are in the process of being standardized, such as mass connectivity, ultra-reliability, and guaranteed low latency. However, 5G will not meet all requirements of the future in 2030 and beyond, and sixth generation (6G) wireless communication networks are expected to provide global coverage, enhanced spectral/energy/cost efficiency, better intelligence level and security, etc. To meet these requirements, 6G networks will rely on new enabling technologies, i.e., air interface and transmission technologies and novel network architecture, such as waveform design, multiple access, channel coding schemes, multi-antenna technologies, network slicing, cell-free architecture, and cloud/fog/edge computing. Our vision on 6G is that it will have four new paradigm shifts. First, to satisfy the requirement of global coverage, 6G will not be limited to terrestrial communication networks, which will need to be complemented with non-terrestrial networks such as satellite and unmanned aerial vehicle (UAV) communication networks, thus achieving a space-air-ground-sea integrated communication network. Second, all spectra will be fully explored to further increase data rates and connection density, including the sub-6 GHz, millimeter wave (mmWave), terahertz (THz), and optical frequency bands. Third, facing the big datasets generated by the use of extremely heterogeneous networks, diverse communication scenarios, large numbers of antennas, wide bandwidths, and new service requirements, 6G networks will enable a new range of smart applications with the aid of artificial intelligence (AI) and big data technologies. Fourth, network security will have to be strengthened when developing 6G networks. This article provides a comprehensive survey of recent advances and future trends in these four aspects. Clearly, 6G with additional technical requirements beyond those of 5G will enable faster and further communications to the extent that the boundary between physical and cyber worlds disappears.

/pdf/towards-6g-wireless-communication-networks-vision-enabling-2tj7a36yux.pdf

Towards 6G wireless communication networks: vision, enabling technologies, and new paradigm shifts

Single-photon avalanche diode (SPAD) arrays are solid-state detectors that offer imaging capabilities at the level of individual photons, with unparalleled photon counting and time-resolved performance. This fascinating technology has progressed at a very fast pace in the past 15 years, since its inception in standard CMOS technology in 2003. A host of architectures have been investigated, ranging from simpler implementations, based solely on off-chip data processing, to progressively "smarter" sensors including on-chip, or even pixel level, time-stamping and processing capabilities. As the technology has matured, a range of biophotonics applications have been explored, including (endoscopic) FLIM, (multibeam multiphoton) FLIM-FRET, SPIM-FCS, super-resolution microscopy, time-resolved Raman spectroscopy, NIROT and PET. We will review some representative sensors and their corresponding applications, including the most relevant challenges faced by chip designers and end-users. Finally, we will provide an outlook on the future of this fascinating technology.

/pdf/single-photon-avalanche-diode-imagers-in-biophotonics-review-setjdh2ziy.pdf

Single-photon avalanche diode imagers in biophotonics: review and outlook

White light generation by mixing red, green, and blue laser diodes (RGB LDs) was demonstrated with Commission International de l’Eclairage coordinates of (0.2928, 0.2981), a correlated color temperature of 8382 K, and a color rendering index of 54.4 to provide a maximal illuminance of 7540 lux. All the white lights generated using RGB LDs were set within the risk group-1 criterion to avoid the blue-light hazard to human eyes. In addition, the RGB-LD mixed white light was diffused using a frosted glass to avoid optical aberration and to improve the performance of the lighting source. In addition, visible light communication (VLC) by using RGB-LD mixed white-light carriers and a point-to-point scheme over 1 m was performed in the directly modulated 16-QAM OFDM data format. In back-to-back transmission, the maximal allowable data rate at 10.8, 10.4, and 8 Gbps was determined for R, G, and B LDs, respectively. Moreover, the RGB-LD mixed white light-based indoor wavelength-division multiplexing (WDM)-VLC system yielded a total allowable transmission data rate of 8.8 Gbps over 0.5 m in free space. Such a high-speed RGB-LD mixed WDM-VLC system without any channel interference can be used to simultaneously provide data transmission and white lighting in an indoor environment.

/pdf/tricolor-r-g-b-laser-diode-based-eye-safe-white-lighting-2cwm6tlnw8.pdf

Tricolor R/G/B Laser Diode Based Eye-Safe White Lighting Communication Beyond 8 Gbit/s.

The field of visible light communications (VLC) has gained significant interest over the last decade, in both fibre and free-space embodiments. In fibre systems, the availability of low cost plastic optical fibre (POF) that is compatible with visible data communications has been a key enabler. In free-space applications, the availability of hundreds of THz of the unregulated spectrum makes VLC attractive for wireless communications. This paper provides an overview of the recent developments in VLC systems based on gallium nitride (GaN) light-emitting diodes (LEDs), covering aspects from sources to systems. The state-of-the-art technology enabling bandwidth of GaN LEDs in the range of >400 MHz is explored. Furthermore, advances in key technologies, including advanced modulation, equalisation, and multiplexing that have enabled free-space VLC data rates beyond 10 Gb/s are also outlined.

/pdf/a-review-of-gallium-nitride-leds-for-multi-gigabit-per-4fgs6zvkvk.pdf

A review of gallium nitride LEDs for multi-gigabit-per-second visible light data communications

In many fields one encounters the challenge of identifying, out of a pool of possible designs, those that simultaneously optimize multiple objectives. This means that usually there is not one optimal design but an entire set of Pareto-optimal ones with optimal tradeoffs in the objectives. In many applications, evaluating one design is expensive; thus, an exhaustive search for the Pareto-optimal set is unfeasible. To address this challenge, we propose the Pareto Active Learning (PAL) algorithm which intelligently samples the design space to predict the Pareto-optimal set. Key features of PAL include (1) modeling the objectives as samples from a Gaussian process distribution to capture structure and accomodate noisy evaluation; (2) a method to carefully choose the next design to evaluate to maximize progress; and (3) the ability to control prediction accuracy and sampling cost. We provide theoretical bounds on PAL's sampling cost required to achieve a desired accuracy. Further, we show an experimental evaluation on three real-world data sets. The results show PAL's effectiveness; in particular it improves significantly over a state-of-the-art multi-objective optimization method, saving in many cases about 33% evaluations to achieve the same accuracy.

/pdf/active-learning-for-multi-objective-optimization-4sl86no8z1.pdf

Active Learning for Multi-Objective Optimization

We present the first 3D-stacked backside illuminated (BSI) single photon avalanche diode (SPAD) image sensor capable of both single photon counting (SPC) intensity, and time resolved imaging. The 128×120 prototype has a pixel pitch of 7.83 μm making it the smallest pixel reported for SPAD image sensors. A low power, high density 40nm bottom tier hosts the quenching front end and processing electronics while an imaging specific 65nm top tier hosts the photo-detectors with a 1-to-1 hybrid bond connection [1]. The SPAD exhibits a median dark count rate (DCR) below 200cps at room temperature and 1V excess bias, and has a peak photon detection probability (PDP) of 27.5% at 640nm and 3 V excess bias.

/pdf/backside-illuminated-spad-image-sensor-with-7-83mm-pitch-in-25pln7s583.pdf

Backside illuminated SPAD image sensor with 7.83μm pitch in 3D-stacked CMOS technology

A digital silicon photomultiplier in 130-nm CMOS imaging technology implements time-correlated single photon counting at an order of magnitude beyond the conventional pile-up limit. The sensor comprises a $32 \times 32\,\,43$ % fill-factor single photon avalanche diode array with a multi-event folded-flash time-to-digital converter architecture operating at 10 GS/s. 264 bins $\times16$ bit histograms are generated and read out from the chip at a maximal 188 kHz enabling fast time resolved scanning or ultrafast low-light event capture. Full optical and electrical characterization results are presented.

/pdf/a-cmos-spad-sensor-with-a-multi-event-folded-flash-time-to-1utvpw0p8q.pdf

A CMOS SPAD Sensor With a Multi-Event Folded Flash Time-to-Digital Converter for Ultra-Fast Optical Transient Capture

III-nitride laser diodes (LDs) are promising sources for light fidelity (LiFi) networks, underwater wireless optical communications (UWOC), and plastic optical fiber (POF) communications [1] due to their high modulation bandwidths ($\gt 5$GHz) compared to LEDs ($\lt 20$ MHz). Their narrow linewidths also enable robust free-space Gb/s LiFi links in the presence of high intensities of sunlight through selective spectral filtering. Fully integrated CMOS visible light communications (VLC) receivers have recently been developed to enable miniaturised and low cost Gb/s LD-based links [2]. Sensitivity of these devices is constrained by electrical noise sources such as thermal, shot or excess noise related to the employment of PIN photodiodes (PDs) or linear avalanche photodiodes (APDs) and their amplification circuits. The extremely high gain of SPADs operating in Geiger mode allows quantum sensitivity limits to be approached [3], [4]. A SPAD receiver (RX) for fiber optic applications achieved 200Mb/s at $6.5\times 10 ^{-3}$ BER within 24dB of the quantum limit [3]. In this paper, we demonstrate a fully integrated CMOS SPAD RX SoC extending this data rate by $2.5 \times $to 500Mb/s, whilst improving sensitivity to -46.1dBm, reducing the margin to the quantum limit to only 15dB. Our RX architecture permits massively parallel (4096) photon event summation to be achieved at a high fill-factor (43%) and sample rate (800MHz). Detector redundancy obviates the requirement on current RX implementations that the SPAD dead time be matched to the symbol period to achieve the maximum data rate [3, 4, 5]. Another advantage is that complex modulation schemes such as OFDM or PAM can be applied for high spectral efficiency and multipath interference mitigation. We demonstrate the RX in a practical, background insensitive VLC link at 1m in 1klx ambient conditions using a 450nm LD. The higher power consumption and dead time pile-up nonlinearity of the SPADs at high signal levels, leads us to conclude that the practical use of this device to be in assistance (rather than replacement) of existing APD or PIN RXs for LiFi, UWOC and POF applications towards extended link range or maintaining a low rate link in highly scattering environments.

29.7 A 500Mb/s -46.1dBm CMOS SPAD Receiver for Laser Diode Visible-Light Communications

This paper studies complex modulation schemes, including orthogonal frequency-division multiplexing (OFDM), received by a single photon avalanche diode (SPAD) array integrated circuit (IC). A SPAD operates in the Geiger mode, and is able to detect single photons. This feature enables order of magnitude receiver sensitivity in intensity modulation (IM) / direct detection (DD) Visible Light Communication (VLC) systems. The tradeoff between received power and bit error ratio (BER) using both pulse-amplitude modulation (PAM) and OFDM is shown. A first order model of the noise in a digital SPAD receiver is derived. The noise in the experimental receiver chip approaches the predicted noise in our model, and we achieve receiver sensitivity of $-$64 dBm with a 100 kbit/s signal at a BER of 10^-5. It is concluded that future improvements in SPAD VLC receiver architecture will allow sensitivity to approach the quantum limit.

/pdf/a-spad-based-visible-light-communications-receiver-employing-4b40amkual.pdf

A SPAD-Based Visible Light Communications Receiver Employing Higher Order Modulation

In recent years multi-core processors have seen broad adoption in application domains ranging from embedded systems through general-purpose computing to large-scale data centres. Simulation technology for multi-core systems, however, lags behind and does not provide the simulation speed required to effectively support design space exploration and parallel software development. While state-of-the-art instruction set simulators (Iss) for single-core machines reach or exceed the performance levels of speed-optimised silicon implementations of embedded processors, the same does not hold for multi-core simulators where large performance penalties are to be paid. In this paper we develop a fast and scalable simulation methodology for multi-core platforms based on parallel and just-in-time (Jit) dynamic binary translation (Dbt). Our approach can model large-scale multi-core configurations, does not rely on prior profiling, instrumentation, or compilation, and works for all binaries targeting a state-of-the-art embedded multi-core platform implementing the ARCompact instruction set architecture (Isa). We have evaluated our parallel simulation methodology against the industry standard Splash-2 and Eembc MultiBench benchmarks and demonstrate simulation speeds up to 25,307 Mips on a 32-core ×86 host machine for as many as 2048 target processors whilst exhibiting minimal and near constant overhead.

/pdf/scalable-multi-core-simulation-using-parallel-dynamic-binary-3qpyihmv93.pdf

Oscar Almer

Papers

Backside illuminated SPAD image sensor with 7.83μm pitch in 3D-stacked CMOS technology

A CMOS SPAD Sensor With a Multi-Event Folded Flash Time-to-Digital Converter for Ultra-Fast Optical Transient Capture

29.7 A 500Mb/s -46.1dBm CMOS SPAD Receiver for Laser Diode Visible-Light Communications

A SPAD-Based Visible Light Communications Receiver Employing Higher Order Modulation

Scalable multi-core simulation using parallel dynamic binary translation