Multiconductor or multiwire arrangements find many applications in electronic systems. Examples are interconnections between digital circuits or integrated microwave circuits. Equivalent circuit models are derived here from an integral equation to establish an electrical description of the physical geometry. The models, which are appropriately called partial element equivalent circuits (PEEC), are general in that they include losses. Models of different complexity can be constructed, to suit the application at hand.

Equivalent Circuit Models for Three-Dimensional Multiconductor Systems

Equivalent Circuit Models for Tliree-Dirnensional Multiconductor Systems

A mesh analysis equation formulation technique combined with a multipole-accelerated Generalized Minimal Residual (GMRES) matrix solution algorithm is used to compute the 3-D frequency dependent inductances and resistances in nearly order n time and memory where n is the number of volume-filaments. The mathematical formulation and numerical solution are discussed, including two types of preconditioners for the GMRES algorithm. Results from examples are given to demonstrate that the multipole acceleration can reduce required computation time and memory by more than an order of magnitude for realistic integrated circuit packaging problems. >

FASTHENRY: a multipole-accelerated 3-D inductance extraction program

A fast algorithm for computing the capacitance of a complicated three-dimensional geometry of ideal conductors in a uniform dielectric is described and its performance in the capacitance extractor FastCap is examined. The algorithm is an acceleration of the boundary-element technique for solving the integral equation associated with the multiconductor capacitance extraction problem. The authors present a generalized conjugate residual iterative algorithm with a multipole approximation to compute the iterates. This combination reduces the complexity so that accurate multiconductor capacitance calculations grow nearly as nm, where m is the number of conductors. Performance comparisons on integrated circuit bus crossing problems show that for problems with as few as 12 conductors the multipole accelerated boundary element method can be nearly 500 times faster than Gaussian-elimination-based algorithms, and five to ten times faster than the iterative method alone, depending on required accuracy. >

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FastCap: a multipole accelerated 3-D capacitance extraction program

The Waveform Relaxation (WR) method is an iterative method for analyzing nonlinear dynamical systems in the time domain. The method, at each iteration, decomposes the system into several dynamical subsystems each of which is analyzed for the entire given time interval. Sufficient conditions for convergence of the WR method are proposed and examples in MOS digital integrated circuits are given to show that these conditions are very mild in practice. Theoretical and computational studies show the method to be efficient and reliable.

The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits

The nodal method has been widely used for formulating circuit equations in computer-aided network analysis and design programs. However, several limitations exist in this method including the inability to process voltage sources and current-dependent circuit elements in a simple and efficient manner. A modified nodal analysis (MNA) method is proposed here which retains the simplicity and other advantages of nodal analysis while removing its limitations. A simple and effective pivoting scheme is also given. Numerical examples are used to compare the MNA method with the tableau method. Favorable results are observed for the MNA method in terms of the dimension, number of nonzeros, and fill-ins for comparable circuit matrices.

https://cseweb.ucsd.edu/classes/fa04/cse245/Reading/MNA.pdf

The modified nodal approach to network analysis

The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency computation times.

Efficient Capacitance Calculations for Three-Dimensional Multiconductor Systems

The parallel-plate waveguide with a two-layer loading medium, a conducting semiconductor substrate, and a relatively thin dielectric layer approximates the interconnections in many integrated systems if the fringing fields are ignored. The fundamental mode of this structure is an E mode which is a surface wave. Its propagation behavior is analyzed in this paper and the equations are evaluated by highly accurate numerical methods. The semiconducting substrate is characterized by its dielectric constant and conductivity. A critical conductivity /spl sigma//sub min/ exists and is related to the cross sectional and material parameters. If the substrate conductivity is given by /spl sigma//sub min/ then the attenuation constant of the line is a minimum. The same value of conductivity yields minimum phase distortion at maximum bandwidth. If the conductivity is larger than /spl sigma//sub min/ the substrate acts as a poor conductor with associated skin effect; if it is smaller, lossy dielectric behavior results. Analysis shows that it is appropriate to subdivide the frequency range into three intervals. The lowest-frequency interval is characterized by propagation which resembles diffusion. This is caused by the loss in the dielectric layer. The next frequency range extends to some upper frequency which is determined by substrate conductivity and the cross-sectional dimensions. In this interval, the phase velocity of the fundamental mode is controlled by the ratio of dielectric to semiconductor thickness, which, if typical interconnections are considered, implies a very low velocity. This property indicates that the structure can serve as a delay line. Further increases in frequency result in higher phase velocities. Skin effect and dielectric loss behavior describe the propagation in this third interval.

A Parallel-Plate Waveguide Approach to Microminiaturized, Planar Transmission Lines for Integrated Circuits

New concepts are introduced relating aspects of circuit theory to the multicapacitances which can be obtained from a computer program for multiconductor geometries. These concepts are applied to the wiring of an integrated circuit chip. Capacitances are found for crossovers, vias, and right angle bends for a realistic geometry.

P.A. Brennan

Papers

The modified nodal approach to network analysis

Efficient Capacitance Calculations for Three-Dimensional Multiconductor Systems

A Parallel-Plate Waveguide Approach to Microminiaturized, Planar Transmission Lines for Integrated Circuits

Capacitance models for integrated circuit metallization wires