We show that successive cancellation list decoding can be formulated exclusively using log-likelihood ratios. In addition to numerical stability, the log-likelihood ratio based formulation has useful properties that simplify the sorting step involved in successive cancellation list decoding. We propose a hardware architecture of the successive cancellation list decoder in the log-likelihood ratio domain which, compared with a log-likelihood domain implementation, requires less irregular and smaller memories. This simplification, together with the gains in the metric sorter, lead to $ 56\%$ to $137\%$ higher throughput per unit area than other recently proposed architectures. We then evaluate the empirical performance of the CRC-aided successive cancellation list decoder at different list sizes using different CRCs and conclude that it is important to adapt the CRC length to the list size in order to achieve the best error-rate performance of concatenated polar codes. Finally, we synthesize conventional successive cancellation decoders at large block-lengths with the same block-error probability as our proposed CRC-aided successive cancellation list decoders to demonstrate that, while our decoders have slightly lower throughput and larger area, they have a significantly smaller decoding latency.

LLR-Based Successive Cancellation List Decoding of Polar Codes

A reflection of our ultimate understanding of a complex system is our ability to control its behavior. Typically, control has multiple prerequisites: It requires an accurate map of the network that governs the interactions between the system's components, a quantitative description of the dynamical laws that govern the temporal behavior of each component, and an ability to influence the state and temporal behavior of a selected subset of the components. With deep roots in nonlinear dynamics and control theory, notions of control and controllability have taken a new life recently in the study of complex networks, inspiring several fundamental questions: What are the control principles of complex systems? How do networks organize themselves to balance control with functionality? To address these here we review recent advances on the controllability and the control of complex networks, exploring the intricate interplay between a system's structure, captured by its network topology, and the dynamical laws that govern the interactions between the components. We match the pertinent mathematical results with empirical findings and applications. We show that uncovering the control principles of complex systems can help us explore and ultimately understand the fundamental laws that govern their behavior.

Control Principles of Complex Networks

Multi-server environment is the most common scenario for a large number of enterprise class applications. In this environment, user registration at each server is not recommended. Using multi-server authentication architecture, user can manage authentication to various servers using single identity and password. We introduce a new authentication scheme for multi-server environments using Chebyshev chaotic map. In our scheme, we use the Chebyshev chaotic map and biometric verification along with password verification for authorization and access to various application servers. The proposed scheme is light-weight compared to other related schemes. We only use the Chebyshev chaotic map, cryptographic hash function and symmetric key encryption-decryption in the proposed scheme. Our scheme provides strong authentication, and also supports biometrics & password change phase by a legitimate user at any time locally, and dynamic server addition phase. We perform the formal security verification using the broadly-accepted Automated Validation of Internet Security Protocols and Applications (AVISPA) tool to show that the presented scheme is secure. In addition, we use the formal security analysis using the Burrows-Abadi-Needham (BAN) logic along with random oracle models and prove that our scheme is secure against different known attacks. High security and significantly low computation and communication costs make our scheme is very suitable for multi-server environments as compared to other existing related schemes.

Secure Biometric-Based Authentication Scheme Using Chebyshev Chaotic Map for Multi-Server Environment

Many technological networks can experience random and/or systematic failures in their components. More destructive situations can happen if the components have limited capacity, where the failure in one of them might lead to a cascade of failures in other components, and consequently break down the structure of the network. In this paper, the tolerance of cascaded failures was investigated in weighted networks. Three weighting strategies were considered including the betweenness centrality of the edges, the product of the degrees of the end nodes, and the product of their betweenness centralities. Then, the effect of the cascaded attack was investigated by considering the local weighted flow redistribution rule. The capacity of the edges was considered to be proportional to their initial weight distribution. The size of the survived part of the attacked network was determined in model networks as well as in a number of real-world networks including the power grid, the internet in the level of autonomous system, the railway network of Europe, and the United States airports network. We found that the networks in which the weight of each edge is the multiplication of the betweenness centrality of the end nodes had the best robustness against cascaded failures. In other words, the case where the load of the links is considered to be the product of the betweenness centrality of the end nodes is favored for the robustness of the network against cascaded failures.

Cascaded failures in weighted networks.

We derive the stationary probability distribution for a non-equilibrium system composed by an arbitrary number of degrees of freedom that are subject to Gaussian colored noise and a conservative potential. This is based on a multidimensional version of the Unified Colored Noise Approximation. By comparing theory with numerical simulations we demonstrate that the theoretical probability density quantitatively describes the accumulation of active particles around repulsive obstacles. In particular, for two particles with repulsive interactions, the probability of close contact decreases when one of the two particle is pinned. Moreover, in the case of isotropic confining potentials, the radial density profile shows a non trivial scaling with radius. Finally we show that the theory well approximates the "pressure" generated by the active particles allowing to derive an equation of state for a system of non-interacting colored noise-driven particles.

Multidimensional Stationary Probability Distribution for Interacting Active Particles

The explosive demand in wireless-capable devices, especially with the proliferation of multiple standards, indicates a great opportunity for adoption of wireless technology at a mass-market level. The communication devices of both today and the future will have not only to allow for a variety of applications, supporting the transfer of characters, audio, graphics, and video data, but they will also have to maintain connection with many other devices rather than with a single base station, in a variety of environments. Moreover, to provide various services from different wireless communication standards with higher capacities and higher data-rates, fully integrated and multifunctional wireless devices will be required. Multifunctional circuits and systems can be made profitable by a large scale of integration, elimination of external components, reduction of silicon area, and extensive reuse of resources. Integration of (Bi)CMOS transceiver RF front-end and analog baseband circuits with computing CMOS circuits on the same silicon chip further reduces costs of multifunctional mobile devices. However, as batteries continue to determine the lifetime and size of mobile equipment, further extension of capabilities of wearable and wireless devices will depend critically on the integrated circuits and systems solutions. The demand for multifunctional and multi-mode wireless-capable devices is accompanied by many significant challenges at system, circuit, and technology levels. In the Special Issue on Multifunctional Circuits and Systems for Future Generations of Wireless Communications, we are looking for circuits and systems solutions for multiple communication standards. Examples of topics qualifying for the special issue include: • Adaptive radio circuits and systems • Multifunctional multistandard multi-band circuits and systems • Software-defined radio circuits and systems • Cognitive radio circuits and systems • Low-voltage low-power RF and analog circuits for future generations wireless systems • Ultra Wide Band circuits and systems

Ieee transactions on circuits and systems—ii: express briefs

The optimization of shift‐and‐add network for constant multiplications is found to have great potential for reducing the area, delay, and power consumption of implementation of multiplications in several computation‐intensive applications not only in dedicated hardware but also in programmable computing systems. To simplify the shift‐and‐add network in single constant multiplication (SCM) circuits, this chapter discusses three design approaches, including direct simplification from a given number representation, simplification by redundant signed digit (SD) representation, and simplification by adder graph. Examples of the multiple constant multiplication (MCM) methods are constant matrix multiplication, discrete cosine transform (DCT) or fast Fourier transform (FFT), and polyphase finite impulse response (FIR) filters and filter banks. The given constant multiplication methods can be used for matrix multiplications and inner‐product; and can be applied easily to image/video processing and graphics applications. The chapter further discusses some of the shortcomings in the current research on constant multiplications, and possible scopes of improvement.

Shift‐Add Circuits for Constant Multiplications

DA-Based Circuits for Inner-Product Computation

Residue number system (RNS) is a well developed computing technique and popularly used in several digital signal processing, communication, and security applications. For RNS‐based computation, one need to do the following: converting the decimal or binary number to RNS representation by evaluating the residues; performing all arithmetic operations in residue domain; and convert back the result in residue representation to decimal or binary representation. An RNS‐based processor consists of binary to RNS convertor, residue domain processors, and the RNS to binary converter. This chapter deals with various issues involved in the design of RNS‐based processors. It discusses RNS to binary conversion, and considers the topic of scaling and base extension. It further describes modulo addition and subtraction, and modulo multiplication and squaring. Several applications of RNS for realizing FIR filters, cryptographic hardware and digital communication systems have been described in literature. The chapter concludes by reviewing these applications.

RNS‐Based Arithmetic Circuits and Applications

Carry propagation in radix‐based number systems, like the conventional binary or decimal number systems, is the main issue that slows down the arithmetic operations. Some well‐known solutions to handle the carry propagation problem are carry look‐ahead addition, residue number systems, and redundant number systems. This chapter aims to study a variety of redundant number systems, representations, and encodings, as well as their applications and impact on the performance of digital arithmetic operations. It deals with circuit realization of redundant arithmetic operations and number encodings that facilitate design process and enhance performance. The chapter also discusses the conversion from binary to redundant number systems and the reverse. Conversion details and circuitry, greatly depends on the redundant digit set and encoding, which is used for representation of redundant digits. Furthermore, the chapter provides special arithmetic circuits such as arithmetic shifters, and gives the examples of some applications.

Pramod Kumar Meher

Papers

Ieee transactions on circuits and systems—ii: express briefs

Shift‐Add Circuits for Constant Multiplications

DA-Based Circuits for Inner-Product Computation

RNS‐Based Arithmetic Circuits and Applications

Redundant Number System‐Based Arithmetic Circuits