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Shuji Yoshizawa
Researcher at University of Tokyo
Publications - 53
Citations - 1794
Shuji Yoshizawa is an academic researcher from University of Tokyo. The author has contributed to research in topics: Artificial neural network & Evolvable hardware. The author has an hindex of 16, co-authored 53 publications receiving 1731 citations. Previous affiliations of Shuji Yoshizawa include Tamagawa University.
Papers
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Journal ArticleDOI
Network information criterion-determining the number of hidden units for an artificial neural network model
TL;DR: The problem of model selection, or determination of the number of hidden units, can be approached statistically, by generalizing Akaike's information criterion (AIC) to be applicable to unfaithful models with general loss criteria including regularization terms.
Journal ArticleDOI
Chaos and phase locking in normal squid axons
Gen Matsumoto,Kazuyuki Aihara,Yoshiro Hanyu,Nobuyuki Takahashi,Shuji Yoshizawa,Jin-ichi Nagumo +5 more
TL;DR: By using periodic current stimulation, chaotic potential responses could be evoked in squid axons immersed in normal seawater and the occurence of intermittent chaos arose through a subcritical period-doubling bifurcation, indicating some similarity of the dynamical structures between the Rayleigh-Benard convection and the squid axon systems.
Journal ArticleDOI
Adaptive neural oscillator using continuous-time back-propagation learning
Kenji Doya,Shuji Yoshizawa +1 more
TL;DR: A neural network model of temporal pattern memory in animal motor systems is proposed that receives an external oscillatory input with some desired wave form, then, after sufficient learning, the network autonomously oscillates in the previously given wave form.
Journal ArticleDOI
Capacity of associative memory using a nonmonotonic neuron model
TL;DR: A piecewise linear model of the nonmonotonic neuron is used and the existence and stability of equilibrium states of the recalling process are investigated and two kinds of theoretical estimates of the absolute capacity are derived.
Book ChapterDOI
Hardware Evolution at Function Level
Masahiro Murakawa,Shuji Yoshizawa,Isamu Kajitani,Tatsumi Furuya,Masaya Iwata,Tetsuya Higuchi +5 more
TL;DR: This paper describes a function-level Evolvable Hardware, hardware which is built on programmable logic devices and whose architecture can be reconfigured by using a genetic learning to adapt to new unknown environments in real time.