The silicon carbide semiconductor device includes a substrate, a drift layer, a base region, a source region, a trench, a gate insulating layer, a gate electrode, a source electrode, a drain electrode, and a deep layer. The deep layer is disposed under the base region and is located to a depth deeper than the trench. The deep layer is divided into a plurality of portions in a direction that crosses a longitudinal direction of the trench. The portions include a group of portions disposed at positions corresponding to the trench and arranged at equal intervals in the longitudinal direction of the trench. The group of portions surrounds corners of a bottom of the trench.

Silicon carbide semiconductor device and method of manufacturing the same

In a silicon carbide semiconductor device such as a trench gate type power MOSFET, the film thickness and the impurity concentration of a thin film silicon carbide semiconductor layer formed on a trench side face to constitute an accumulation-type channel-forming region and enable the device to operate with a low gate voltage, low on-resistance and low power loss are set so that on impression of a reverse bias voltage a pn junction between a P-type epitaxial layer and an n - -type epitaxial layer undergoes avalanche breakdown before the thin film silicon carbide semiconductor layer undergoes punch-through. By this means it is possible to obtain a target high source-drain withstand voltage.

Silicon carbide semiconductor device and manufacturing method thereof

This silicon-carbide semiconductor device (101) has a silicon-carbide substrate (10), a main electrode (52), a first barrier layer (70a), and a wiring layer (60). The main electrode (52) is provided directly on top of the silicon-carbide substrate (10). The first barrier layer (70a) is provided on top of the main electrode (52) and is made from a conductive material that does not contain aluminum. The wiring layer (60) is provided on top of the first barrier layer (70a), is isolated from the main electrode (52) by the first barrier layer (70a), and is made from a material that does contain aluminum.

Silicon carbide semiconductor device

The theoretical limit of a lateral wide band-gap semiconductor (WBS) power device was estimated for SiC, GaN and diamond. The lateral WBS device realizes ultra-low on-resistance due to a very short gate-drain offset, and a power integration circuit with very high power can be easily realized even with a small chip. The lateral WBS devices with breakdown voltage of over 1 kV realized on-resistance below 1 mΩ cm2. For the breakdown voltage of over 10 kV, diamond devices are attractive due to the large critical field (5.6 MV/cm). Although the WBS device realizes drastic reduction of both the chip area and the power loss, the heat dissipation technique and high current density switching capability are also important for bringing out the potential of the WBS device.

Theoretical limit estimation of lateral wide band-gap semiconductor power-switching device

A multilevel converter-based, intelligent, universal transformer includes back-to-back, interconnected, multi-level converters coupled to a switched inverter circuit via a high-frequency transformer. The input of the universal transformer can be coupled to a high-voltage distribution system and the output of the universal transformer can be coupled to low-voltage applications. The universal transformer is smaller in size than conventional copper-and-iron based transformers, yet provides enhanced power quality performance and increased functionality.

Multilevel converter based intelligent universal transformer

A power MOS-FET is used as a high side switch transistor for a non-insulated DC/DC converter. An electrode section that serves as a source terminal of the power MOS-FET is connected to one outer lead and two outer leads via bonding wires respectively. The outer lead is an external terminal connected to a path for driving the gate. Each of the outer leads is an external terminal connected to a main current path. Owing to the connection of the main current path and the gate driving path in discrete form, the influence of parasitic inductance can be reduced and voltage conversion efficiency can be improved.

Semiconductor device and power supply system

A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.

Isolator and a modem device using the isolator

We have developed a multichannel monolithic isolator that can provide 2.3 kV ac isolation and 100-MHz signal transmission. The isolator uses high-voltage, on-chip isolator technology including trench isolation with buried oxide on the silicon-on-oxide (SOI) substrate and 0.4 /spl mu/m CMOS driver and receiver circuits. This technology lets us produce a four-channel monolithic isolator with an area of 1.5 mm/sup 2/ and a consumption current of 0.5 mA per channel at a frequency of 50 MHz. These operating values suggest that the monolithic isolator can miniaturize the communication interface and reduce power consumption since discrete devices, such as transformers and opto-couplers, are unnecessary. We have also developed a one-chip modem interface LSI that includes the multichannel isolator and an analog front-end circuit.

A high-voltage monolithic isolator for a communication network interface

A wide bandgap semiconductor single crystal is applied as a semiconductor substrate material of a semiconductor surge absorber, and a surge absorption operation starting voltage is set by a punchthrough of a pn junction, to obtain a semiconductor surge absorber with a repetitive operation and a high surge endurance.

Semiconductor surge absorber, electrical-electronic apparatus, and power module using the same

We have developed a multi-channel monolithic isolator IC that can provide 2.3 kVac isolation and 100 MHz signal transmission. This IC uses high voltage on-chip isolator technology using trench isolation with buried oxide on the SOI substrate and 0.4 /spl mu/m CMOS driver and receiver circuits. This technology enables to produce a 4-channel monolithic isolator with an area of 1.5 mm/sup 2/ and a consumption current of 0.5 mA per channel at a frequency of 50 MHz. We have also developed a one-chip modem interface IC that includes the multi-channel isolator and an analog front-end circuit.

Takayuki Iwasaki

Papers

Semiconductor device and power supply system

Isolator and a modem device using the isolator

A high-voltage monolithic isolator for a communication network interface

Semiconductor surge absorber, electrical-electronic apparatus, and power module using the same

2.3 kVac 100 MHz multi-channel monolithic isolator IC