1980 Preface * 1999 Preface * 1999 Acknowledgements * Introduction * 1 Circular Logic * 2 Phase Singularities (Screwy Results of Circular Logic) * 3 The Rules of the Ring * 4 Ring Populations * 5 Getting Off the Ring * 6 Attracting Cycles and Isochrons * 7 Measuring the Trajectories of a Circadian Clock * 8 Populations of Attractor Cycle Oscillators * 9 Excitable Kinetics and Excitable Media * 10 The Varieties of Phaseless Experience: In Which the Geometrical Orderliness of Rhythmic Organization Breaks Down in Diverse Ways * 11 The Firefly Machine 12 Energy Metabolism in Cells * 13 The Malonic Acid Reagent ('Sodium Geometrate') * 14 Electrical Rhythmicity and Excitability in Cell Membranes * 15 The Aggregation of Slime Mold Amoebae * 16 Numerical Organizing Centers * 17 Electrical Singular Filaments in the Heart Wall * 18 Pattern Formation in the Fungi * 19 Circadian Rhythms in General * 20 The Circadian Clocks of Insect Eclosion * 21 The Flower of Kalanchoe * 22 The Cell Mitotic Cycle * 23 The Female Cycle * References * Index of Names * Index of Subjects

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/596B270197FE27DE5FABB598B6210622/S0025557200150892a.pdf/div-class-title-span-class-italic-the-geometry-of-biological-time-span-by-a-t-winfree-pp-544-dm68-corrected-second-printing-1990-isbn-3-540-52528-9-springer-div.pdf

The geometry of biological time , by A. T. Winfree. Pp 544. DM68. Corrected Second Printing 1990. ISBN 3-540-52528-9 (Springer)

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

In a world where resources are scarce and urban areas consume the vast majority of these resources, it is vital to make cities greener and more sustainable. Advanced systems to improve and automate processes within a city will play a leading role in smart cities. From smart design of buildings, which capture rain water for later use, to intelligent control systems, which can monitor infrastructures autonomously, the possible improvements enabled by sensing technologies are immense. Ubiquitous sensing poses numerous challenges, which are of a technological or social nature. This paper presents an overview of the state of the art with regards to sensing in smart cities. Topics include sensing applications in smart cities, sensing platforms and technical challenges associated with these technologies. In an effort to provide a holistic view of how sensing technologies play a role in smart cities, a range of applications and technical challenges associated with these applications are discussed. As some of these applications and technologies belong to different disciplines, the material presented in this paper attempts to bridge these to provide a broad overview, which can be of help to researchers and developers in understanding how advanced sensing can play a role in smart cities.

The Role of Advanced Sensing in Smart Cities

Figures of merit connecting processing capabilities with power dissipated (OpS/Watt, Joule/bit, etc.) are becoming dominant factors in choosing technologies for implementing the next generation of computing and communication network systems. Superconductivity is viewed as a technology capable of achieving higher energy efficiencies than other technologies. Static power dissipation of standard RSFQ logic, associated with dc bias resistors, is responsible for most of the circuit power dissipation. In this paper, we review and compare different superconductor digital technology approaches and logic families addressing this problem. We present a novel energy-efficient single flux quantum logic family, ERSFQ/eSFQ. We also discuss energy-efficient approaches for output data interface and overall cryosystem design.

/pdf/energy-efficient-single-flux-quantum-technology-144o6vu2zy.pdf

Energy-Efficient Single Flux Quantum Technology

This paper presents a low power boost converter for thermoelectric energy harvesting that demonstrates an efficiency that is 15% higher than the state-of-the-art for voltage conversion ratios above 20. This is achieved by utilizing a technique allowing synchronous rectification in the discontinuous conduction mode. A low-power method for input voltage monitoring is presented. The low input voltage requirements allow operation from a thermoelectric generator powered by body heat. The converter, fabricated in a 0.13 μm CMOS process, operates from input voltages ranging from 20 mV to 250 mV while supplying a regulated 1 V output. The converter consumes 1.6 (1.1) μW of quiescent power, delivers up to 25 (175) μW of output power, and is 46 (75)% efficient for a 20 mV and 100 mV input, respectively.

A 20 mV Input Boost Converter With Efficient Digital Control for Thermoelectric Energy Harvesting

https://onlinelibrary.wiley.com/doi/pdf/10.1002/ecj.12265

Detecting tampered region in video using LSTM and U‐Net

This paper describes a low-power IoT sensor node SoC that can be used for factory automation and wearable healthcare applications. It features dynamic power scheduling method suitable for the environment that works with an energy harvester. Our proposed SoC architecture is composed of a low power (60 nA) RTC, a normally-off RF which has fast start-up time (0.5 µs), and other low-power components. A mixed-signal SoC has been fabricated using the TSMC 65 nm LP process. The sensor node system equipped with dynamic power scheduling consumes about 3.4 µW when the activity ratio is 0.1%. Evaluation results show that the proposed method can reduce about 51% of the power consumption compared with the case without dynamic power scheduling in sensor node SoC. Also, the parameters of the system in energy harvesting environment can be adjusted under the trade-off with power consumption and measurement accuracy according to the application requirements.

An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment

PROBLEM TO BE SOLVED: To provide a relaxation oscillation circuit that generates a more constant frequency clock than the prior art.SOLUTION: A clock generation sub-circuit 1 is controlled so as to alternately repeat a comparison voltage generation period of generating a comparison voltage Vcmp1 including a reference voltage Vref and an error voltage ΔV1 of a comparator 14 and outputting it as an output voltage Vsub1 to an inverting input terminal of the comparator 14, and a clock generation period of comparing an output voltage Vc1 from a current-voltage conversion circuit 11 with the comparison voltage Vcmp1. A clock generation sub-circuit 2 is also controlled so as to alternately repeat such a comparison voltage generation period and a clock generation period like the clock generation sub-circuit 1. A control circuit 5 controls the clock generation sub-circuits 1 and 2 such that one circuit is in the comparison voltage generation period while the other circuit is in the clock generation period.

Relaxation oscillation circuit

/pdf/improvement-of-luminance-isotropy-for-convolutional-neural-3q18p2s4xr.pdf

Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution

PROBLEM TO BE SOLVED: To output an accurate digital value by correcting characteristic deterioration caused by a delay time of a comparator or other nonideal factors.SOLUTION: In a single slope type A/D converter circuit, a clock is counted while comparing a ramp voltage which is changed with the passage of time, with an analog input voltage, and a count value of clocks corresponding to the elapsed time in the case where the ramp voltage is smaller than the analog input voltage, is outputted as a first digital value after A/D conversion. The ramp voltage is compared with first and second reference voltages, respectively, and counter means counts clocks in parallel with the comparing process. Control means outputs count values of clocks corresponding to the elapsed times as second and third digital values after A/D conversion, divides a difference between the first digital value and the second digital value or a difference between the first digital value and the third digital value with a difference between the second digital value and the third digital value, and outputs a value of a division result as a value corresponding to an A/D conversion value.

Tetsuya Hirose

Papers

Detecting tampered region in video using LSTM and U‐Net

An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment

Relaxation oscillation circuit

Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution

A/d converter circuit