The III-nitrides include the semiconductors AlN, GaN and InN, which have band gaps spanning the entire UV and visible ranges. Thin films of III-nitrides are used to make UV, violet, blue and green light-emitting diodes and lasers, as well as solar cells, high-electron mobility transistors (HEMTs) and other devices. However, the film growth process gives rise to unusually high strain and high defect densities, which can affect the device performance. X-ray diffraction is a popular, non-destructive technique used to characterize films and device structures, allowing improvements in device efficiencies to be made. It provides information on crystalline lattice parameters (from which strain and composition are determined), misorientation (from which defect types and densities may be deduced), crystallite size and microstrain, wafer bowing, residual stress, alloy ordering, phase separation (if present) along with film thicknesses and superlattice (quantum well) thicknesses, compositions and non-uniformities. These topics are reviewed, along with the basic principles of x-ray diffraction of thin films and areas of special current interest, such as analysis of non-polar, semipolar and cubic III-nitrides. A summary of useful values needed in calculations, including elastic constants and lattice parameters, is also given. Such topics are also likely to be relevant to other highly lattice-mismatched wurtzite-structure materials such as heteroepitaxial ZnO and ZnSe.

https://iopscience.iop.org/article/10.1088/0034-4885/72/3/036502/pdf

X-ray diffraction of III-nitrides

In this review, the structural, mechanical, thermal, and chemical properties of substrates used for gallium nitride (GaN) epitaxy are compiled, and the properties of GaN films deposited on these substrates are reviewed. Among semiconductors, GaN is unique; most of its applications uses thin GaN films deposited on foreign substrates (materials other than GaN); that is, heteroepitaxial thin films. As a consequence of heteroepitaxy, the quality of the GaN films is very dependent on the properties of the substrate—both the inherent properties such as lattice constants and thermal expansion coefficients, and process induced properties such as surface roughness, step height and terrace width, and wetting behavior. The consequences of heteroepitaxy are discussed, including the crystallographic orientation and polarity, surface morphology, and inherent and thermally induced stress in the GaN films. Defects such as threading dislocations, inversion domains, and the unintentional incorporation of impurities into the epitaxial GaN layer resulting from heteroepitaxy are presented along with their effect on device processing and performance. A summary of the structure and lattice constants for many semiconductors, metals, metal nitrides, and oxides used or considered for GaN epitaxy is presented. The properties, synthesis, advantages and disadvantages of the six most commonly employed substrates (sapphire, 6H-SiC, Si, GaAs, LiGaO 2 , and AlN) are presented. Useful substrate properties such as lattice constants, defect densities, elastic moduli, thermal expansion coefficients, thermal conductivities, etching characteristics, and reactivities under deposition conditions are presented. Efforts to reduce the defect densities and to optimize the electrical and optical properties of the GaN epitaxial film by substrate etching, nitridation, and slight misorientation from the (0 0 0 1) crystal plane are reviewed. The requirements, the obstacles, and the results to date to produce zincblende GaN on 3C-SiC/Si(0 0 1) and GaAs are discussed. Tables summarizing measures of the GaN quality such as XRD rocking curve FWHM, photoluminescence peak position and FWHM, and electron mobilities for GaN epitaxial layers produced by MOCVD, MBE, and HVPE for each substrate are given. The initial results using GaN substrates, prepared as bulk crystals and as free-standing epitaxial films, are reviewed. Finally, the promise and the directions of research on new potential substrates, such as compliant and porous substrates are described.

Substrates for gallium nitride epitaxy

Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.

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The 2018 GaN power electronics roadmap

A nitride semiconductor light-emitting device has an active layer of a single-quantum well structure or multi-quantum well made of a nitride semiconductor containing indium and gallium. A first p-type clad layer made of a p-type nitride semiconductor containing aluminum and gallium is provided in contact with one surface of the active layer. A second p-type clad layer made of a p-type nitride semiconductor containing aluminum and gallium is provided on the first p-type clad layer. The second p-type clad layer has a larger band gap than that of the first p-type clad layer. An n-type semiconductor layer is provided in contact with the other surface of the active layer.

Nitride semiconductor light emitting device

Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer (33) formed of a metal between a semiconductor layer (20) and a bonding substrate (31). When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented.

Light-emitting device and method of manufacturing the same

The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.

Gallium nitride materials and methods

A gallium nitride microelectronic layer is fabricated by converting a surface of a (111) silicon layer to 3C-silicon carbide. A layer of 3C-silicon carbide is then epitaxially grown on the converted surface of the (111) silicon layer. A layer of 2H-gallium nitride then is grown on the epitaxially grown layer of 3C-silicon carbide. The layer of 2H-gallium nitride then is laterally grown to produce the gallium nitride microelectronic layer. In one embodiment, the silicon layer is a (111) silicon substrate, the surface of which is converted to 3C-silicon carbide. In another embodiment, the (111) silicon layer is part of a Separation by IMplanted OXygen (SIMOX) silicon substrate which includes a layer of implanted oxygen that defines the (111) layer on the (111) silicon substrate. In yet another embodiment, the (111) silicon layer is a portion of a Silicon-On-Insulator (SOI) substrate in which a (111) silicon layer is bonded to a substrate. Lateral growth of the layer of 2H-gallium nitride may be performed by Epitaxial Lateral Overgrowth (ELO) wherein a mask is formed on the layer of 2H-gallium nitride, the mask including at least one opening that exposes the layer of 2H-gallium nitride. The layer of 2H-gallium nitride then is laterally grown through the at least one opening and onto the mask. A second, offset mask also may be formed on the laterally grown layer of 2H-gallium nitride and a second laterally grown layer of 2H-gallium nitride may be overgrown onto the offset mask. Lateral growth of the layer of 2H-gallium nitride also may be performed using pendeoepitaxial techniques wherein at least one trench and/or post is formed in a layer of 2H-gallium nitride to define at least one sidewall therein. The layer of 2H-gallium nitride is then laterally grown from the at least one sidewall. Pendeoepitaxial lateral growth preferably continues until the laterally grown sidewalls coalesce on the top of the posts or trenches. The top of the posts and/or the trench floors may be masked to promote lateral growth and reduce nucleation and vertical growth.

Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby

An underlying gallium nitride layer on a silicon carbide substrate is masked with a mask that includes an array of openings therein, and the underlying gallium nitride layer is etched through the array of openings to define posts in the underlying gallium nitride layer and trenches therebetween. The posts each include a sidewall and a top having the mask thereon. The sidewalls of the posts are laterally grown into the trenches to thereby form a gallium nitride semiconductor layer. During this lateral growth, the mask prevents nucleation and vertical growth from the tops of the posts. Accordingly, growth proceeds laterally into the trenches, suspended from the sidewalls of the posts. The sidewalls of the posts may be laterally grown into the trenches until the laterally grown sidewalls coalesce in the trenches to thereby form a gallium nitride semiconductor layer. The lateral growth from the sidewalls of the posts may be continued so that the gallium nitride layer grows vertically through the openings in the mask and laterally overgrows onto the mask on the tops of the posts, to thereby form a gallium nitride semiconductor layer. The lateral overgrowth can be continued until the grown sidewalls coalesce on the mask to thereby form a continuous gallium nitride semiconductor layer. Microelectronic devices may be formed in the continuous gallium nitride semiconductor layer.

Pendeoepitaxial gallium nitride semiconductor layers on silicon carbide substrates

Pendeoepitaxy, a form of selective lateral growth of GaN thin films has been developed using GaN/AlN/6H–SiC(0001) substrates and produced by organometallic vapor phase epitaxy. Selective lateral growth is forced to initiate from the (1120) GaN sidewalls of etched GaN seed forms by incorporating a silicon nitride seed mask and employing the SiC substrate as a pseudomask. Coalescence over and between the seed forms was achieved. Transmission electron microscopy revealed that all vertically threading defects stemming from the GaN/AlN and AlN/SiC interfaces are contained within the seed forms and a substantial reduction in the dislocation density of the laterally grown GaN. Atomic force microscopy analysis of the (1120) face of discrete pendeoepitaxial structures revealed a root mean square roughness of 0.98 A. The pendeoepitaxial layer photoluminescence band edge emission peak was observed to be 3.454 eV and is blueshifted by 12 meV as compared to the GaN seed layer.

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Pendeoepitaxy of gallium nitride thin films

More specifically, gallium nitride semiconductor layers may be fabricated by etching an underlying gallium nitride layer on a sapphire substrate, to define at least one post in the underlying gallium nitride layer and at least one trench in the underlying gallium nitride layer. The at least one post includes a gallium nitride top and a gallium nitride sidewall. The at least one trench includes a trench floor. The gallium nitride sidewalls are laterally grown into the at least one trench, to thereby form a gallium nitride semiconductor layer. However, prior to performing the laterally growing step, the sapphire substrate and/or the underlying gallium nitride layer is treated to prevent growth of gallium nitride from the trench floor from interfering with the lateral growth of the gallium nitride sidewalls of the at least one post into the at least one trench. Embodiments of gallium nitride semiconductor structures according to the present invention can include a sapphire substrate and an underlying gallium nitride layer on the sapphire substrate. The underlying gallium nitride layer includes therein at least one post and at least one trench. The at least one post each includes a gallium nitride top and a gallium nitride sidewall. The at least one trench includes a sapphire floor. A lateral gallium nitride layer extends laterally from the gallium nitride sidewall of the at least one post into the at least one trench. In a preferred embodiment, the at least one trench extends into the sapphire substrate such that the at least one post each includes a gallium nitride top, a gallium nitride sidewall and a sapphire sidewall and the at least one trench includes a sapphire floor. The sapphire floor preferably is free of a vertical gallium nitride layer thereon and the sapphire sidewall height to sapphire floor width ratio preferably exceeds about ¼. A mask may be included on the sapphire floor and an aluminum nitride buffer layer also may be included between the sapphire substrate and the underlying gallium nitride layer. A mask also may be included on the gallium nitride top. The mask on the floor and the mask on the top preferably comprise same material.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby

Thomas Gehrke

Papers

Gallium nitride materials and methods

Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby

Pendeoepitaxial gallium nitride semiconductor layers on silicon carbide substrates

Pendeoepitaxy of gallium nitride thin films

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby