Todor Stefanov

TL;DR: ALOHA is presented, an integrated tool flow that tries to facilitate the design of DL applications and their porting on embedded heterogenous architectures and aims at automating different design steps and reducing development costs.

TL;DR: The ALOHA framework is described, that proposes a solution to the issue of effort and skills required to develop new DL models, or to adapt existing ones to new use-cases by means of an integrated tool flow that automates most phases of the development process.

TL;DR: A hierarchical memory system with a programmable controller to transfer data between external and on-chip memories using a DMA mechanism does not require arbitration which results in better overall performance.

TL;DR: A model is developed that can assist designers at the system-level DSE stage to explore the utilization of the reconfigurable resources and evaluate the relative impact of certain design choices and can be used to explore various design parameters by evaluating the system performance for different application-to-architecture mappings.

TL;DR: This case study starts from a modified M-JPEG application and map this application onto a shared memory multi-processor architecture using Spade architecture and mapping languages.