基礎講座 電気泳動(Electrophoresis)

Using nonlocal empirical pseudopotentials, we compute the band structure and shear deformation potentials of strained Si, Ge, and SiGe alloys. Fitting the theoretical results to experimental data on the phonon‐limited carrier mobilities in bulk Si and Ge, the dilatation deformation potential Ξd is found to be 1.1 eV for the Si Δ minima, −4.4 eV for the Ge L minima, corresponding to a value for the valence band dilatation deformation potential a of approximately 2 eV for both Si and Ge. The optical deformation potential d0 is found to be 41.45 and 41.75 eV for Si and Ge, respectively. Carrier mobilities in strained Si and Ge are then evaluated. The results show a large enhancement of the hole mobility for both tensile and compressive strain along the [001] direction, but only a modest enhancement (approximately 60%) of the electron mobility for tensile biaxial strain in Si. Finally, from a fit to carrier mobilities in relaxed SiGe alloys, the effective alloy scattering potential is determined to be about 0...

Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys

PCR microfluidic devices for DNA amplification

Silicon has enabled the rise of the semiconductor electronics industry, but it was not the first material used in such devices. During the 1950s, just after the birth of the transistor, solid-state devices were almost exclusively manufactured from germanium. Today, one of the key ways to improve transistor performance is to increase charge-carrier mobility within the device channel. Motivated by this, the solid-state device research community is returning to investigating the high-mobility material germanium. Germanium-based transistors have the potential to operate at high speeds with low power requirements and might therefore be used in non-silicon-based semiconductor technology in the future.

Academic and industry research progress in germanium nanodevices

Freely suspended metallic single-walled carbon nanotubes (SWNTs) exhibit reduced current carrying ability compared to those lying on substrates, and striking negative differential conductance at low electric fields. Theoretical analysis reveals significant self-heating effects including electron scattering by hot nonequilibrium optical phonons. Electron transport characteristics under strong self-heating are exploited for the first time to probe the thermal conductivity of individual SWNTs (approximately 3600 W m-1 K-1 at T=300 K) up to approximately 700 K, and reveal a 1/T dependence expected for umklapp phonon scattering at high temperatures.

http://nanoheat.stanford.edu/sites/default/files/publications/A77.pdf

Negative differential conductance and hot phonons in suspended nanotube molecular wires.

Intrinsic charge trap capacitive non-volatile flash memories take a significant share of the semiconductor electronics market today. It is challenging to create intrinsic traps in the dielectric layer without high temperature processing steps. The main issue is to optimize the leakage current and intrinsic trap density simultaneously. Moreover, conventional memory devices need the support of tunneling and blocking layers since the charge trapping dielectric layer is incapable of preventing the memory leakage. Here we report a tunable flash memory device without tunneling and blocking layer by combining the discovery of high intrinsic charge traps of more than 1012 cm−2, together with low leakage current of less than 10−7 A cm−2 in solution derived, inorganic, spin-coated dielectric films which were heated at 200 °C or below. In addition, the memory storage capacity is tuned systematically upto 96% by controlling the trap density with increasing heating temperature. Realizing efficient non-volatile flash memories that do not require high temperature processing to create suitable charge trapping remains a challenge. Here, the authors report low-temperature solution-processed oxide-based flash memories with low leakage, tunable memory storage and good retention.

/pdf/low-temperature-below-200-c-solution-processed-tunable-flash-2c8ng8w280.pdf

Low temperature below 200 °C solution processed tunable flash memory device without tunneling and blocking layer.

We demonstrate charge trapping memory devices comprising aluminum oxide phosphate (ALPO) blocking/indium gallium zinc oxide charge-trapping/ALPO tunneling layers with a bottom-gated architecture fabricated by sol-gel process technique at temperatures as low as 300 °C. The memory device offers a large memory hysteresis of 13.5 V in the Id–Vg curve when the gate voltage is swept from −20 to +30 V and back. The true program-erase (P/E) window of 7 V is established for the P/E square pulse of ±20 V s−1. Good retention characteristic is confirmed within the experimental limit of 104 s. The P/E mechanism is illustrated by the complete band structure of the memory devices. We also demonstrate a control device without a charge trapping layer, which shows excellent thin film transistor characteristics.

All inorganic solution processed three terminal charge trapping memory device

A microchip thermocycler, fabricated from silicon and Pyrex #7740 glass, is described. Usual resistive heating has been replaced by induction heating, leading to much simpler fabrication steps. Heating and cooling rates of 6.5 and 4.2 °C/s, respectively have been achieved, by optimising the heater dimensions and heating frequency (∼200 kHz). Four devices are mounted on a heater, resulting in low power consumption (∼1.4 W per device on the average). Using simple on–off electronic temperature control, a temperature stability within ∼0.2 °C is achieved. Features such as induction heating, good temperature control, battery operation, and low power consumption make the device suitable for portable applications, particularly in polymerase chain reaction (PCR) systems.

A portable battery-operated chip thermocycler based on induction heating

We report the tunability of the electronic band structure, especially the electron affinity, of an all-inorganic precursor processed sol-gel aluminium oxide phosphate dielectric by the influence of processing temperature. The dielectric offers tunable electron affinity ranging from 1.42 eV to 0.72 eV with the change in processing temperature from as-prepared to 1000 °C, respectively. The remarkable change in electron affinity is ascribed to the variation in the bulk oxygen concentration in solution processed oxide. As a result, the leakage current of the dielectric is affected significantly by a factor of ∼103.

Tunable electron affinity with electronic band alignment of solution processed dielectric

Modulation-doped two-dimensional hole gas structures consisting of a strained germanium channel on relaxed Ge07Si03 buffer layers were grown by molecular-beam epitaxy Sample processing was optimized to substantially reduce the contribution from the parasitic conducting layers Very high hall mobilities of 1700 cm2/V s for holes were observed at 295 K which are the highest reported to date for any kind of p-type silicon-based heterostructures Hall measurements were carried out from 13 to 300 K to determine the temperature dependence of the mobility and carrier concentration The carrier concentration at room temperature was 79×1011 cm−2 and decreased by only 26% at 13 K, indicating very little parallel conduction The high-temperature mobility obeys a T−α behavior with α∼2, which can be attributed to intraband optical phonon scattering

V. Venkataraman

Papers

Low temperature below 200 °C solution processed tunable flash memory device without tunneling and blocking layer.

All inorganic solution processed three terminal charge trapping memory device

A portable battery-operated chip thermocycler based on induction heating

Tunable electron affinity with electronic band alignment of solution processed dielectric

High room-temperature hole mobility in Ge0.7Si0.3/Ge/Ge0.7Si0.3 modulation-doped heterostructures