W
Walter Stechele
Researcher at Technische Universität München
Publications - 200
Citations - 1981
Walter Stechele is an academic researcher from Technische Universität München. The author has contributed to research in topics: Control reconfiguration & Field-programmable gate array. The author has an hindex of 21, co-authored 189 publications receiving 1746 citations. Previous affiliations of Walter Stechele include Ludwig Maximilian University of Munich.
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ALF: Autoencoder-based Low-rank Filter-sharing for Efficient Convolutional Neural Networks
Alexander Frickenstein,Manoj Rohit Vemparala,Nael Fasfous,Laura Hauenschild,Naveen Shankar Nagaraja,Christian Unger,Walter Stechele +6 more
TL;DR: In this article, an autoencoder-based low-rank filter-sharing technique technique (ALF) is proposed to reduce the computational complexity and memory footprint of deep learning applications for deployment in resource constrained environments.
Patent
Query preparation and rendering for procuring information from multimedia databases involves searching information from database through query that is based on descriptor of digitized data
TL;DR: In this paper, either video and audio data are digitized and their characteristics extracted using a suitable analysis algorithm to obtain at least one descriptor which is sent to a database, the database is searched for information through an query based on the descriptor.
Patent
Method for processing image data values stored in a hierarchical last in first out memory, for use in imaging analysis, coding and compression prior to transmission and archiving, etc.
Walter Stechele,Stephan Herrmann +1 more
TL;DR: In this article, a propagation process is used starting with a first memory address stored in an address LIFO and continuing until no more addresses are available or until a stop criterion is fulfilled.
Proceedings ArticleDOI
Luminance Correction in Stereo Correspondence Based Structure from Motion
TL;DR: A new approach for illumination correction of local error minimization in disparity space is derived that provides the high speed needed for mobile devices, but also decreases the number of false matches by an a priori restriction of correction values.
Proceedings ArticleDOI
AutoVision - flexible processor architecture for video-assisted driving
TL;DR: The AutoVision processor is a dynamically reconfigurable MPSoC prototype where video-specific pixel processing engines are on-the-fly loaded or exchanged without interrupting regular system operations, and dynamic replacement of processing engines ensures an automatic and area efficient adaptation to various driving conditions.