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Wen-Kuan Yeh
Researcher at National University of Kaohsiung
Publications - 198
Citations - 1856
Wen-Kuan Yeh is an academic researcher from National University of Kaohsiung. The author has contributed to research in topics: Silicon on insulator & MOSFET. The author has an hindex of 19, co-authored 193 publications receiving 1489 citations. Previous affiliations of Wen-Kuan Yeh include Hodges University.
Papers
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Journal ArticleDOI
Impacts of Notched-Gate Structure on Contact Etch Stop Layer (CESL) Stressed 90-nm nMOSFET
Chien-Ting Lin,Yean-Kuen Fang,Wen-Kuan Yeh,Chieh-Ming Lai,Che-Hua Hsu,Li-Wei Cheng,Guang Hwa Ma +6 more
TL;DR: In this article, mobility improvements by stress contact etch stop layer (CESL) in a strained 90-nm nMOSFET, with and without notched-gate structure, were studied in detail.
Journal ArticleDOI
AlN Surface Passivation of GaN-Based High Electron Mobility Transistors by Plasma-Enhanced Atomic Layer Deposition.
An-Jye Tzou,Kuo-Hsiung Chu,I-Feng Lin,Erik Østreng,Yung-Sheng Fang,Xiao-Peng Wu,Bo-Wei Wu,Chang-Hong Shen,Jia-Ming Shieh,Wen-Kuan Yeh,Chun-Yen Chang,Chun-Yen Chang,Hao-Chung Kuo +12 more
TL;DR: A low current collapse GaN-based high electron mobility transistor (HEMT) with an excellent thermal stability at 150 °C and a good thermal reliability under high power operation is reported.
Journal ArticleDOI
Reliability Improvement of 28-nm High- $k$ /Metal Gate-Last MOSFET Using Appropriate Oxygen Annealing
Yi-Lin Yang,Wenqi Zhang,Chi-Yun Cheng,Yi-Ping Huang,Pin-Tseng Chen,Chia-Wei Hsu,Li-Kong Chin,Chien-Ting Lin,Che-Hua Hsu,Chien-Ming Lai,Wen-Kuan Yeh +10 more
TL;DR: In this paper, both oxygen and nitrogen were diffuse into a high-k/SiO2 interfacial layer to suppress the formation of oxygen vacancy, thus reducing the gate leakage current without increasing effective oxide thickness.
Journal ArticleDOI
Ge GAA FETs and TMD FinFETs for the Applications Beyond Si—A Review
Yao-Jen Lee,Guang-Li Luo,Fu-Ju Hou,Min-Cheng Chen,Chih-Chao Yang,Chang-Hong Shen,Wen-Fa Wu,Jia-Min Shieh,Wen-Kuan Yeh +8 more
TL;DR: In this paper, a gate-all-around field effect transistors (GAA FET) was proposed for defect-free Si/TMD 3DFETs, which achieved state-of-the-art performance.
Proceedings ArticleDOI
First fully functionalized monolithic 3D+ IoT chip with 0.5 V light-electricity power management, 6.8 GHz wireless-communication VCO, and 4-layer vertical ReRAM
Fu-Kuo Hsueh,Chang-Hong Shen,Jia-Min Shieh,Kai-Shin Li,Hsiu-Chih Chen,Wen-Hsien Huang,Hsing-Hsiang Wang,Chih-Chao Yang,Tung-Ying Hsieh,Chang-Hsien Lin,Bo-Yuan Chen,Yu-Shao Shiao,Guo-Wei Huang,Oi-Ying Wong,Po-Hung Chen,Wen-Kuan Yeh +15 more
TL;DR: This unique TSV-free monolithic 3D 3D+IC process provides the superiority in 3D hetero-integration; it successfully integrate these circuits in a low cost, small footprint, fully functionalized 3D+ IoT chip.