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Yogesh Singh Chauhan

Researcher at Indian Institute of Technology Kanpur

Publications -  328
Citations -  4763

Yogesh Singh Chauhan is an academic researcher from Indian Institute of Technology Kanpur. The author has contributed to research in topics: Transistor & MOSFET. The author has an hindex of 30, co-authored 265 publications receiving 3355 citations. Previous affiliations of Yogesh Singh Chauhan include École Normale Supérieure & Indian Institutes of Technology.

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Proceedings ArticleDOI

Micromagnetic Simulations of Magnetization Dynamics Due to Position-dependent Spin-Orbit Torque From Topological Insulator

TL;DR: In this article , a micromagnetic simulation study has been performed to analyze the magnetization switching dynamics of a ferromagnet on a topological insulator surface, based on an analytical solution obtained for the spin-orbit torque which is position-dependent due to current shunting in the bilayer.

Efficient Implementation of Max-Pooling Algorithm Exploiting History-Effect in Ferroelectric-FinFETs

TL;DR: This work has designed a novel feature-to-pulse mapping scheme and exploit the history-effect in the polarization state of Fe-FinFETs (which is otherwise undesirable for memory application), and proposed a highly scalable, compact, and energy-efficient implementation of the max-pooling algorithm utilizing a single Ferroelectric (Fe)- FinFET.
Proceedings ArticleDOI

Accurate modeling of centroid shift in III-V FETs including non-linear potential profile and wave-function penetration

TL;DR: In this article, a quantum mechanical model of charge centroid is presented for III-V FETs, taking into account the finite potential barrier at the semiconductor/insulator interface and also the non-linearity of the potential profile.
Journal ArticleDOI

Designing Power-Efficient Transistors Using Narrow-Bandwidth Materials from the <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline" overflow="scroll"><mml:mi>M</mml:mi><mml:msub><mml:mi>A</mml:mi><mml:mn>2</mml:mn></mml:msub><mml:msub><mml:mi>Z</mml:mi><mml:mn>4</mml:mn></mml:

TL;DR: In this article , the authors proposed a solution to this problem by using narrow-bandwidth semiconductors to limit the thermionic leakage current by filtering out the high-energy carriers.