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Yuan Xie
Researcher at University of California, Santa Barbara
Publications - 794
Citations - 32484
Yuan Xie is an academic researcher from University of California, Santa Barbara. The author has contributed to research in topics: Computer science & Cache. The author has an hindex of 76, co-authored 739 publications receiving 24155 citations. Previous affiliations of Yuan Xie include Pennsylvania State University & Foundation University, Islamabad.
Papers
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Proceedings ArticleDOI
MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems
Zhenhua Zhu,Hanbo Sun,Kaizhong Qiu,Lixue Xia,Gokul Krishnan,Guohao Dai,Niu Dimin,Xiaoming Chen,X. Sharon Hu,Yu Cao,Yuan Xie,Yu Wang,Huazhong Yang +12 more
TL;DR: A behavior-level modeling tool for memristor-based neuromorphic computing systems, MNSIM 2.0, to model the performance and help researchers to realize an early-stage design space exploration, and a hierarchical modeling structure for PIM systems is proposed.
Journal ArticleDOI
Image captioning via hierarchical attention mechanism and policy gradient optimization
TL;DR: A hierarchical attention model is proposed by utilizing both of the global CNN features and the local object features for more effective feature representation and reasoning in image captioning and achieves state-of-the-art results on several important metrics in the MSCOCO dataset.
Proceedings ArticleDOI
Moguls: a model to explore the memory hierarchy for bandwidth improvements
TL;DR: An analytical performance model called Moguls is proposed, which estimates the performance of an application on a system, using the bandwidth demand of the application for a range of cache capacities and the bandwidth provided by the system with those capacities.
Proceedings ArticleDOI
SuperMem: Enabling Application-transparent Secure Persistent Memory with Low Overheads
Pengfei Zuo,Yu Hua,Yuan Xie +2 more
TL;DR: Experimental results demonstrate that SuperMem improves the performance by about 2× compared with an encrypted NVM with a baseline write-through counter cache, and achieves the performance comparable to an ideal secure NVM that exhibits the optimal performance of anencrypted NVM.
Proceedings ArticleDOI
Modeling TSV open defects in 3D-stacked DRAM
TL;DR: Through extensive simulation studies, this paper models the faulty behavior of TSV open defects occurred on the wordlines and the bitlines of 3D DRAM circuits, which serves as the first step for efficient and effective test and diagnosis solutions for such defects.